Commit Graph

68434 Commits

Author SHA1 Message Date
Stefano Garzarella
8009fcdaa8 .gitignore: ignore docs/built created for in-tree builds
Commit 1290e6711 creates 'docs/built' for in-tree builds of
Sphinx manuals but did not ignore it.

Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20190314104622.101715-2-sgarzare@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-03-14 16:01:55 +01:00
Eric Blake
ec9ac02bb0 maint: Ignore built elf2dmp
Commit 3fa2d384 added a binary 'elf2dmp' but did not ignore it
during an in-tree build.

Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Message-Id: <20190313144557.8845-1-eblake@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-03-14 16:00:08 +01:00
Peter Maydell
9164add701 Final gitdm updates for 4.0
-----BEGIN PGP SIGNATURE-----
 
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 KkTTrwf9EqZBGVfJNh1u5qHwB2KvkwtVqlewIr+c2RJXg8ZNCtN9y0MCxVtn4lA5
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 e3o8v5S60Rknc+rAySWkrSwwBrT8FQ==
 =wv+f
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/stsquad/tags/pull-gitdm-next-120319-1' into staging

Final gitdm updates for 4.0

# gpg: Signature made Tue 12 Mar 2019 19:33:51 GMT
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-gitdm-next-120319-1:
  contrib: gitdm: add a mapping for Janus Technologies
  contrib: gitdm: another IBM email
  contrib: gitdm: add more individual contributors
  contrib: gitdm: Update Wave Computing group
  contrib: gitdm: Update domain-map

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-14 13:48:48 +00:00
Peter Maydell
e4770dd95a Final testing fixes for 4.0
- various CI tweaks and fixes
   - fixes for some tcg tests
   - addition of system tcg tests
 -----BEGIN PGP SIGNATURE-----
 
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 =vg+Q
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-for-4.0-120319-1' into staging

Final testing fixes for 4.0

  - various CI tweaks and fixes
  - fixes for some tcg tests
  - addition of system tcg tests

# gpg: Signature made Tue 12 Mar 2019 17:07:24 GMT
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-testing-for-4.0-120319-1: (26 commits)
  .travis.yml: add softmmu check-tcg tests
  .travis.yml: separate softfloat from check-tcg
  tests/tcg/arm: account for pauth randomness
  tests/tcg/i386: add memory test to exercise softmmu
  tests/tcg/i386: add system mode Hello World test
  tests/tcg: provide a minilib for system tests
  tests/tcg: enable cris base user-mode tests
  tests/tcg/cris: align mul operations
  tests/tcg/cris: comment out the ccs test
  tests/tcg: split cris tests into bare and libc directories
  tests/tcg/cris: cleanup sys.c
  tests/docker: add fedora-cris-cross compilers
  tests/tcg/arm: add ARMv6-M UNDEFINED 32-bit instruction test
  tests/tcg/xtensa: enable system tests
  tests/docker: add debian-xtensa-cross image
  tests/tcg/mips: fix hello-mips compilation
  tests/tcg: add gdb runner variant
  tests/tcg: split run-test into user and system variants
  tests/tcg: add QEMU_OPT option for test runner
  tests/tcg: enable tcg tests for softmmu
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-14 13:04:46 +00:00
Peter Maydell
f6c63c0dbf * ASAN fixes
-----BEGIN PGP SIGNATURE-----
 
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 =ybUj
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* ASAN fixes

# gpg: Signature made Tue 12 Mar 2019 14:35:59 GMT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream:
  test-migration: fix memory leak
  migration: fix memory leak
  test-bdrv-graph-mod: fix Error leak
  test-char: fix undefined behavior

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-14 12:02:12 +00:00
Peter Maydell
dbbc277510 Pull request
* Add 'drop-cache=on|off' option to file-posix.c.  The default is on.
    Disabling the option fixes a QEMU 3.0.0 performance regression when live
    migrating on the same host with cache.direct=off.
 -----BEGIN PGP SIGNATURE-----
 
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 =CH5G
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging

Pull request

 * Add 'drop-cache=on|off' option to file-posix.c.  The default is on.
   Disabling the option fixes a QEMU 3.0.0 performance regression when live
   migrating on the same host with cache.direct=off.

# gpg: Signature made Wed 13 Mar 2019 11:07:48 GMT
# gpg:                using RSA key 9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full]
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>" [full]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* remotes/stefanha/tags/block-pull-request:
  file-posix: add drop-cache=on|off option

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-14 09:34:51 +00:00
Peter Maydell
abb7ede1fb Slirp updates
Daniel P. Berrangé (1):
   configure: remove slirp submodule support that doesn't exist yet
 
 Marc-André Lureau (1):
   slirp: remove empty state.h
 -----BEGIN PGP SIGNATURE-----
 
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 2egrB0/cBhs/XH8b2yc/K9KyjSHz9EWyXnc93NEQw1gkiNPo1Aw=
 =UTTv
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/thibault/tags/samuel-thibault' into staging

Slirp updates

Daniel P. Berrangé (1):
  configure: remove slirp submodule support that doesn't exist yet

Marc-André Lureau (1):
  slirp: remove empty state.h

# gpg: Signature made Wed 13 Mar 2019 21:18:35 GMT
# gpg:                using RSA key E61DBB15D4172BDEC97E92D9DB550E89F0FA54F3
# gpg: Good signature from "Samuel Thibault <samuel.thibault@aquilenet.fr>" [unknown]
# gpg:                 aka "Samuel Thibault <sthibault@debian.org>" [marginal]
# gpg:                 aka "Samuel Thibault <samuel.thibault@gnu.org>" [unknown]
# gpg:                 aka "Samuel Thibault <samuel.thibault@inria.fr>" [marginal]
# gpg:                 aka "Samuel Thibault <samuel.thibault@labri.fr>" [marginal]
# gpg:                 aka "Samuel Thibault <samuel.thibault@ens-lyon.org>" [marginal]
# gpg:                 aka "Samuel Thibault <samuel.thibault@u-bordeaux.fr>" [unknown]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 900C B024 B679 31D4 0F82  304B D017 8C76 7D06 9EE6
#      Subkey fingerprint: E61D BB15 D417 2BDE C97E  92D9 DB55 0E89 F0FA 54F3

* remotes/thibault/tags/samuel-thibault:
  configure: remove slirp submodule support that doesn't exist yet
  slirp: remove empty state.h

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-14 07:43:39 +00:00
Peter Maydell
1fa87eb56e target/riscv: Convert to decodetree
Bastian: this patchset converts the RISC-V decoder to decodetree in four major steps:
 
 1) Convert 32-bit instructions to decodetree [Patch 1-15]:
     Many of the gen_* functions are called by the decode functions for 16-bit
     and 32-bit functions. If we move translation code from the gen_*
     functions to the generated trans_* functions of decode-tree, we get a lot of
     duplication. Therefore, we mostly generate calls to the old gen_* function
     which are properly replaced after step 2).
 
     Each of the trans_ functions are grouped into files corresponding to their
     ISA extension, e.g. addi which is in RV32I is translated in the file
     'trans_rvi.inc.c'.
 
 2) Convert 16-bit instructions to decodetree [Patch 16-18]:
     All 16 bit instructions have a direct mapping to a 32 bit instruction. Thus,
     we convert the arguments in the 16 bit trans_ function to the arguments of
     the corresponding 32 bit instruction and call the 32 bit trans_ function.
 
 3) Remove old manual decoding in gen_* function [Patch 19-29]:
     this move all manual translation code into the trans_* instructions of
     decode tree, such that we can remove the old decode_* functions.
 
 Palmer: This, with some additional cleanup patches, passed Alistar's
 testing on rv32 and rv64 as well as my testing on rv64, so I think it's
 good to go.  I've run my standard test against this exact tag.
 
 I still don't have a Mac to try this on, sorry!
 -----BEGIN PGP SIGNATURE-----
 
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 =t7se
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Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.0-sf4' into staging

target/riscv: Convert to decodetree

Bastian: this patchset converts the RISC-V decoder to decodetree in four major steps:

1) Convert 32-bit instructions to decodetree [Patch 1-15]:
    Many of the gen_* functions are called by the decode functions for 16-bit
    and 32-bit functions. If we move translation code from the gen_*
    functions to the generated trans_* functions of decode-tree, we get a lot of
    duplication. Therefore, we mostly generate calls to the old gen_* function
    which are properly replaced after step 2).

    Each of the trans_ functions are grouped into files corresponding to their
    ISA extension, e.g. addi which is in RV32I is translated in the file
    'trans_rvi.inc.c'.

2) Convert 16-bit instructions to decodetree [Patch 16-18]:
    All 16 bit instructions have a direct mapping to a 32 bit instruction. Thus,
    we convert the arguments in the 16 bit trans_ function to the arguments of
    the corresponding 32 bit instruction and call the 32 bit trans_ function.

3) Remove old manual decoding in gen_* function [Patch 19-29]:
    this move all manual translation code into the trans_* instructions of
    decode tree, such that we can remove the old decode_* functions.

Palmer: This, with some additional cleanup patches, passed Alistar's
testing on rv32 and rv64 as well as my testing on rv64, so I think it's
good to go.  I've run my standard test against this exact tag.

I still don't have a Mac to try this on, sorry!

# gpg: Signature made Wed 13 Mar 2019 13:44:49 GMT
# gpg:                using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41
# gpg:                issuer "palmer@dabbelt.com"
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown]
# gpg:                 aka "Palmer Dabbelt <palmer@sifive.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88  6DF8 EF4C A150 2CCB AB41

* remotes/palmer/tags/riscv-for-master-4.0-sf4: (29 commits)
  target/riscv: Remove decode_RV32_64G()
  target/riscv: Remove gen_system()
  target/riscv: Rename trans_arith to gen_arith
  target/riscv: Remove manual decoding of RV32/64M insn
  target/riscv: Remove shift and slt insn manual decoding
  target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
  target/riscv: Move gen_arith_imm() decoding into trans_* functions
  target/riscv: Remove manual decoding from gen_store()
  target/riscv: Remove manual decoding from gen_load()
  target/riscv: Remove manual decoding from gen_branch()
  target/riscv: Remove gen_jalr()
  target/riscv: Convert quadrant 2 of RVXC insns to decodetree
  target/riscv: Convert quadrant 1 of RVXC insns to decodetree
  target/riscv: Convert quadrant 0 of RVXC insns to decodetree
  target/riscv: Convert RV priv insns to decodetree
  target/riscv: Convert RV64D insns to decodetree
  target/riscv: Convert RV32D insns to decodetree
  target/riscv: Convert RV64F insns to decodetree
  target/riscv: Convert RV32F insns to decodetree
  target/riscv: Convert RV64A insns to decodetree
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-13 22:20:27 +00:00
Daniel P. Berrangé
1f773d9dd3 configure: remove slirp submodule support that doesn't exist yet
The slirp code is not yet split off into a separate repository, so
configuring QEMU to use slirp as a submodule is premature. This
causes the non-existant "slirp" to be requested from git when syncing
submodules. This in turn appears to be cause of non-deterministic
failures some developers are seeing with QEMU's submodule sync process.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20190313173157.30504-1-berrange@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-03-13 22:15:30 +01:00
Marc-André Lureau
cd82b1e170 slirp: remove empty state.h
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20190313173949.2369-1-marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-03-13 22:12:23 +01:00
Peter Maydell
85ce84489a ui: better unicode support for curses, v2.
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
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 =gcY1
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190313-pull-request' into staging

ui: better unicode support for curses, v2.

# gpg: Signature made Wed 13 Mar 2019 07:29:44 GMT
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/ui-20190313-pull-request:
  curses: add option to specify VGA font encoding
  iconv: detect and make curses depend on it

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-13 20:11:06 +00:00
Peter Maydell
3b5b6e9b51 pci, pc, virtio: features, fixes, cleanups
intel-iommu scalable option
 pcie acs emulation
 beginning for vhost-user-blk reconnect and of vhost-user backend work
 misc fixes and cleanups
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

pci, pc, virtio: features, fixes, cleanups

intel-iommu scalable option
pcie acs emulation
beginning for vhost-user-blk reconnect and of vhost-user backend work
misc fixes and cleanups

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Wed 13 Mar 2019 02:52:02 GMT
# gpg:                using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream: (26 commits)
  i386, acpi: check acpi_memory_hotplug capacity in pre_plug
  gen_pcie_root_port: Add ACS (Access Control Services) capability
  pcie: Add a simple PCIe ACS (Access Control Services) helper function
  vhost-user-blk: Add support to get/set inflight buffer
  libvhost-user: Support tracking inflight I/O in shared memory
  libvhost-user: Introduce vu_queue_map_desc()
  libvhost-user: Remove unnecessary FD flag check for event file descriptors
  vhost-user: Support transferring inflight buffer between qemu and backend
  nvdimm: use NVDIMM_ACPI_IO_LEN for the proper IO size
  nvdimm: use *function* directly instead of allocating it again
  nvdimm: fix typo in nvdimm_build_nvdimm_devices argument
  intel_iommu: add scalable-mode option to make scalable mode work
  intel_iommu: add 256 bits qi_desc support
  intel_iommu: scalable mode emulation
  libvhost-user: add vu_queue_unpop()
  libvhost-user-glib: export vug_source_new()
  vhost-user: split vhost_user_read()
  vhost-user: wrap some read/write with retry handling
  libvhost-user: exit by default on VHOST_USER_NONE
  vhost-user: simplify vhost_user_init/vhost_user_cleanup
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-13 19:10:40 +00:00
Peter Maydell
523a2a42c3 Pull request
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Merge remote-tracking branch 'remotes/jnsnow/tags/bitmaps-pull-request' into staging

Pull request

# gpg: Signature made Tue 12 Mar 2019 20:23:08 GMT
# gpg:                using RSA key F9B7ABDBBCACDF95BE76CBD07DEF8106AAFC390E
# gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" [full]
# Primary key fingerprint: FAEB 9711 A12C F475 812F  18F2 88A9 064D 1835 61EB
#      Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76  CBD0 7DEF 8106 AAFC 390E

* remotes/jnsnow/tags/bitmaps-pull-request: (22 commits)
  tests/qemu-iotests: add bitmap resize test 246
  block/qcow2-bitmap: Allow resizes with persistent bitmaps
  block/qcow2-bitmap: Don't check size for IN_USE bitmap
  docs/interop/qcow2: Improve bitmap flag in_use specification
  bitmaps: Fix typo in function name
  block/dirty-bitmaps: implement inconsistent bit
  block/dirty-bitmaps: disallow busy bitmaps as merge source
  block/dirty-bitmaps: prohibit removing readonly bitmaps
  block/dirty-bitmaps: prohibit readonly bitmaps for backups
  block/dirty-bitmaps: add block_dirty_bitmap_check function
  block/dirty-bitmap: add inconsistent status
  block/dirty-bitmaps: add inconsistent bit
  iotests: add busy/recording bit test to 124
  blockdev: remove unused paio parameter documentation
  block/dirty-bitmaps: move comment block
  block/dirty-bitmaps: unify qmp_locked and user_locked calls
  block/dirty-bitmap: explicitly lock bitmaps with successors
  nbd: change error checking order for bitmaps
  block/dirty-bitmap: change semantics of enabled predicate
  block/dirty-bitmap: remove set/reset assertions against enabled bit
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	tests/qemu-iotests/group
2019-03-13 17:30:34 +00:00
Peter Maydell
36fe770966 Block layer patches:
- file-posix: Make auto-read-only dynamic
 - Add x-blockdev-reopen QMP command
 - Finalize block-latency-histogram QMP command
 - gluster: Build fixes for newer lib version
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Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block layer patches:

- file-posix: Make auto-read-only dynamic
- Add x-blockdev-reopen QMP command
- Finalize block-latency-histogram QMP command
- gluster: Build fixes for newer lib version

# gpg: Signature made Tue 12 Mar 2019 19:30:31 GMT
# gpg:                using RSA key 7F09B272C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full]
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74  56FE 7F09 B272 C88F 2FD6

* remotes/kevin/tags/for-upstream: (28 commits)
  qemu-iotests: Test the x-blockdev-reopen QMP command
  block: Add an 'x-blockdev-reopen' QMP command
  block: Remove the AioContext parameter from bdrv_reopen_multiple()
  block: Add bdrv_reset_options_allowed()
  block: Add a 'mutable_opts' field to BlockDriver
  block: Allow changing the backing file on reopen
  block: Allow omitting the 'backing' option in certain cases
  block: Handle child references in bdrv_reopen_queue()
  block: Add 'keep_old_opts' parameter to bdrv_reopen_queue()
  block: Freeze the backing chain for the duration of the stream job
  block: Freeze the backing chain for the duration of the mirror job
  block: Freeze the backing chain for the duration of the commit job
  block: Allow freezing BdrvChild links
  nvme: fix write zeroes offset and count
  file-posix: Make auto-read-only dynamic
  file-posix: Prepare permission code for fd switching
  file-posix: Lock new fd in raw_reopen_prepare()
  file-posix: Store BDRVRawState.reopen_state during reopen
  file-posix: Factor out raw_reconfigure_getfd()
  file-posix: Fix bdrv_open_flags() for snapshot=on
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-13 14:44:28 +00:00
Peter Maydell
f39901d59f Break out documentation to docs/devel/.
Add support for pattern groups.
 Other misc cleanups for multiple decode functions.
 -----BEGIN PGP SIGNATURE-----
 
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 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth/tags/pull-dt-20190312' into staging

Break out documentation to docs/devel/.
Add support for pattern groups.
Other misc cleanups for multiple decode functions.

# gpg: Signature made Tue 12 Mar 2019 16:59:37 GMT
# gpg:                using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-dt-20190312:
  decodetree: Properly diagnose fields overflowing an insn
  decodetree: Prefix extract function names with decode_function
  decodetree: Allow +- to begin a number initializing a field
  decodetree: Produce clean output for an empty input file
  decodetree: Add --static-decode option
  test/decode: Add tests for PatternGroups
  decodetree: Allow grouping of overlapping patterns
  decodetree: Do not unconditionaly return from Pattern.output_code
  decodetree: Ensure build_tree does not include values outside insnmask
  decodetree: Document the usefulness of argument sets
  decodetree: Move documentation to docs/devel/decodetree.rst
  MAINTAINERS: Add scripts/decodetree.py to the TCG section

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-13 13:09:38 +00:00
Stefan Hajnoczi
f357fcd890 file-posix: add drop-cache=on|off option
Commit dd577a26ff ("block/file-posix:
implement bdrv_co_invalidate_cache() on Linux") introduced page cache
invalidation so that cache.direct=off live migration is safe on Linux.

The invalidation takes a significant amount of time when the file is
large and present in the page cache.  Normally this is not the case for
cross-host live migration but it can happen when migrating between QEMU
processes on the same host.

On same-host migration we don't need to invalidate pages for correctness
anyway, so an option to skip page cache invalidation is useful.  I
investigated optimizing invalidation and detecting same-host migration,
but both are hard to achieve so a user-visible option will suffice.

As a bonus this option means that the cache invalidation feature will
now be detectable by libvirt via QMP schema introspection.

Suggested-by: Neil Skrypuch <neil@tembosocial.com>
Tested-by: Neil Skrypuch <neil@tembosocial.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 20190307164941.3322-1-stefanha@redhat.com
Message-Id: <20190307164941.3322-1-stefanha@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2019-03-13 10:54:55 +00:00
Bastian Koppelmann
25e6ca30c6 target/riscv: Remove decode_RV32_64G()
decodetree handles all instructions now so the fallback is not necessary
anymore.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
8f7bc27386 target/riscv: Remove gen_system()
with all 16 bit insns moved to decodetree no path is falling back to
gen_system(), so we can remove it.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
8dc9e8a8b0 target/riscv: Rename trans_arith to gen_arith
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
1288701682 target/riscv: Remove manual decoding of RV32/64M insn
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
34446e8458 target/riscv: Remove shift and slt insn manual decoding
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
f2ab172867 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
manual decoding in gen_arith() is not necessary with decodetree. For now
the function is called trans_arith as the original gen_arith still
exists. The former will be renamed to gen_arith as soon as the old
gen_arith can be removed.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
7a50d3e2ae target/riscv: Move gen_arith_imm() decoding into trans_* functions
gen_arith_imm() does a lot of decoding manually, which was hard to read
in case of the shift instructions and is not necessary anymore with
decodetree.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
bce8a342a1 target/riscv: Remove manual decoding from gen_store()
With decodetree we don't need to convert RISC-V opcodes into to MemOps
as the old gen_store() did.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
98898b20e9 target/riscv: Remove manual decoding from gen_load()
With decodetree we don't need to convert RISC-V opcodes into to MemOps
as the old gen_load() did.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
090cc2c898 target/riscv: Remove manual decoding from gen_branch()
We now utilizes argument-sets of decodetree such that no manual
decoding is necessary.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
9e92c57d83 target/riscv: Remove gen_jalr()
trans_jalr() is the only caller, so move the code into trans_jalr().

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:50 +01:00
Bastian Koppelmann
97b0be81f6 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:40:46 +01:00
Bastian Koppelmann
07b001c6fc target/riscv: Convert quadrant 1 of RVXC insns to decodetree
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:38:16 +01:00
Bastian Koppelmann
e98d9140f2 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
4ba79c47a2 target/riscv: Convert RV priv insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
31fe4d35f2 target/riscv: Convert RV64D insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
97f8b49372 target/riscv: Convert RV32D insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
95561ee3b4 target/riscv: Convert RV64F insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
6f0e74ff4b target/riscv: Convert RV32F insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
40b9faecfe target/riscv: Convert RV64A insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
3b77c289ae target/riscv: Convert RV32A insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
d2e2c1e406 target/riscv: Convert RVXM insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
771fbe156a target/riscv: Convert RVXI csr insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
0c865e856a target/riscv: Convert RVXI fence insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
b73a987b09 target/riscv: Convert RVXI arithmetic insns to decodetree
we cannot remove the call to gen_arith() in decode_RV32_64G() since it
is used to translate multiply instructions.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
7e45a682ed target/riscv: Convert RV64I load/store insns to decodetree
this splits the 64-bit only instructions into its own decode file such
that we generate the decoder for these instructions only for the RISC-V
64 bit target.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
c1000d4e1b target/riscv: Convert RV32I load/store insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
3cca75a6fe target/riscv: Convert RVXI branch insns to decodetree
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Bastian Koppelmann
2a53cff418 target/riscv: Activate decodetree and implemnt LUI & AUIPC
for now only LUI & AUIPC are decoded and translated. If decodetree fails, we
fall back to the old decoder.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
2019-03-13 10:34:06 +01:00
Peter Maydell
9298a4e8a6 Misc fixes affecting HP-UX 10.20.
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Merge remote-tracking branch 'remotes/rth/tags/pull-hppa-20190312' into staging

Misc fixes affecting HP-UX 10.20.

# gpg: Signature made Tue 12 Mar 2019 16:16:32 GMT
# gpg:                using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-hppa-20190312:
  target/hppa: exit TB if either Data or Instruction TLB changes
  target/hppa: add TLB protection id check
  target/hppa: allow multiple itlbp without itlba
  target/hppa: fix b,gate instruction
  target/hppa: ignore DIAG opcode
  target/hppa: remove PSW I/R/Q bit check
  target/hppa: add TLB trace events
  target/hppa: report ITLB_EXCP_MISS for ITLB misses
  target/hppa: fix TLB handling for page 0
  target/hppa: fix overwriting source reg in addb
  target/hppa: Check for page crossings in use_goto_tb

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-13 09:33:41 +00:00
Samuel Thibault
2f8b7cd587 curses: add option to specify VGA font encoding
This uses iconv to convert glyphs from the specified VGA font encoding to
unicode, and makes use of cchar_t instead of chtype when using ncursesw,
which allows to store all wide char as well as the WACS values. The default
charset is made CP437 since that is the charset of the hardware default VGA
font. This also makes the curses backend set the LC_CTYPE locale to "" to
allow curses to emit wide characters.

Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Cc: Eddie Kohler <ekohler@gmail.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190311135127.2229-3-samuel.thibault@ens-lyon.org>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-03-13 08:29:06 +01:00
Samuel Thibault
e08bb3010c iconv: detect and make curses depend on it
curses will use it for proper wide output support.

Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Message-Id: <20190311135127.2229-2-samuel.thibault@ens-lyon.org>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-03-13 08:29:01 +01:00
Wei Yang
9040e6dfa8 i386, acpi: check acpi_memory_hotplug capacity in pre_plug
Currently we do device realization like below:

   hotplug_handler_pre_plug()
   dc->realize()
   hotplug_handler_plug()

Before we do device realization and plug, we should allocate necessary
resources and check if memory-hotplug-support property is enabled.

At the piix4 and ich9, the memory-hotplug-support property is checked at
plug stage. This means that device has been realized and mapped into guest
address space 'pc_dimm_plug()' by the time acpi plug handler is called,
where it might fail and crash QEMU due to reaching g_assert_not_reached()
(piix4) or error_abort (ich9).

Fix it by checking if memory hotplug is enabled at pre_plug stage
where we can gracefully abort hotplug request.

Signed-off-by: Wei Yang <richardw.yang@linux.intel.com>
CC: Igor Mammedov <imammedo@redhat.com>
CC: Eric Blake <eblake@redhat.com>
Signed-off-by: Wei Yang <richardw.yang@linux.intel.com>

Message-Id: <20190301033548.6691-1-richardw.yang@linux.intel.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-03-12 22:31:21 -04:00
Knut Omang
e07fb4b50b gen_pcie_root_port: Add ACS (Access Control Services) capability
Claim ACS support in the generic PCIe root port to allow
passthrough of individual functions of a device to different
guests (in a nested virt.setting) with VFIO.
Without this patch, all functions of a device, such as all VFs of
an SR/IOV device, will end up in the same IOMMU group.
A similar situation occurs on Windows with Hyper-V.

In the single function device case, it also has a small cosmetic
benefit in that the root port itself is not grouped with
the device. VFIO handles that situation in that binding rules
only apply to endpoints, so it does not limit passthrough in
those cases.

Signed-off-by: Knut Omang <knut.omang@oracle.com>
Reviewed-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Message-Id: <319460b483f566dd57487eb3dd340ed4c10aa53c.1550768238.git-series.knut.omang@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
2019-03-12 22:31:21 -04:00