Commit Graph

39714 Commits

Author SHA1 Message Date
Peter Crosthwaite 5bcda5f734 monitor: Split mon_get_cpu fn to remove ENV_GET_CPU
The monitor currently has one helper, mon_get_cpu() which will return
an env pointer. The target specific users of this API want an env, but
all the target agnostic users really just want the cpu pointer. These
users then need to use the target-specifically defined ENV_GET_CPU to
navigate back up to the CPU from the ENV. Split the API for the two
uses cases to remove all need for ENV_GET_CPU.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Acked-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-22 17:40:00 +02:00
Bandan Das e549d2aaeb monitor: Fix failure path for "S" argument
Since the "S" argument type is only used with the "?" flag,
the bug can't bite.

Signed-off-by: Bandan Das <bsd@redhat.com>
Acked-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-22 17:40:00 +02:00
Bandan Das dd41eea771 monitor: Point to "help" command on syntax error
When a command fails due to incorrect syntax or input, suggest using
the "help" command to get more information about the command.  This
is only applicable for HMP.

Signed-off-by: Bandan Das <bsd@redhat.com>
Acked-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-22 17:40:00 +02:00
Bandan Das ae50212ff7 monitor: cleanup parsing of cmd name and cmd arguments
There's too much going on in monitor_parse_command().
Split up the arguments parsing bits into a separate function
monitor_parse_arguments(). Let the original function check for
command validity and sub-commands if any and return data (*cmd)
that the newly introduced function can process and return a
QDict. Also, pass a pointer to the cmdline to track current
parser location.

Suggested-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Bandan Das <bsd@redhat.com>
Acked-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-22 17:40:00 +02:00
Bandan Das 19f2db5c84 monitor: remove debug prints
The preferred solution is to use tracepoints and there
is good chance of bitrot with the debug prints not being
enabled at compile time. Remove them.

Suggested-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Bandan Das <bsd@redhat.com>
Acked-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-22 17:40:00 +02:00
Eric Blake 34acbc9522 qobject: Use 'bool' inside qdict
Now that qbool is fixed, let's fix getting and setting a bool
value to a qdict member to also use C99 bool rather than int.

I audited all callers to ensure that the changed return type
will not cause any changed semantics.

Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Alberto Garcia <berto@igalia.com>
Acked-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-22 17:40:00 +02:00
Eric Blake fc48ffc39e qobject: Use 'bool' for qbool
We require a C99 compiler, so let's use 'bool' instead of 'int'
when dealing with boolean values.  There are few enough clients
to fix them all in one pass.

Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Alberto Garcia <berto@igalia.com>
Acked-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-22 17:40:00 +02:00
Peter Maydell 0a3346f5de QOM infrastructure fixes and device conversions
* Changes to name string ownership for alias properties
 * Improvements around enum properties
 * Cleanups around -object handling
 * New helper functions
 * Cleanups of qdev init helper functions
 * Add path argument to qom-tree script
 * QTest cleanup to use new qtest_add_data_func() consistently
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Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging

QOM infrastructure fixes and device conversions

* Changes to name string ownership for alias properties
* Improvements around enum properties
* Cleanups around -object handling
* New helper functions
* Cleanups of qdev init helper functions
* Add path argument to qom-tree script
* QTest cleanup to use new qtest_add_data_func() consistently

# gpg: Signature made Fri Jun 19 18:14:38 2015 BST using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg:                 aka "Andreas Färber <afaerber@suse.com>"

* remotes/afaerber/tags/qom-devices-for-peter:
  qdev: Un-deprecate qdev_init_nofail()
  qdev: Deprecated qdev_init() is finally unused, drop
  qom: Don't pass string table to object_get_enum() function
  qom: Add an object_property_add_enum() helper function
  qom: Make enum string tables const-correct
  qom: Add object_new_with_props() / object_new_withpropv() helpers
  qom: Add helper function for getting user objects root
  vl: Create (most) objects before creating chardev backends
  doc: Document user creatable object types in help text
  backends: Fix typename of 'policy' enum property in hostmem obj
  scripts: Add support for path as argument of qom-tree
  tests: Use qtest_add_data_func() consistently
  qdev: Free property names after registering gpio aliases
  qom: strdup() target property name on object_property_add_alias()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-22 12:50:30 +01:00
Peter Maydell cb4e0f9ddf * i8254 security fix
* Avoid long 100% CPU wait after restarting guests that use the periodic timer
 * Fixes for access clamping (WinXP, MIPS)
 * wixl/.msi support for qemu-ga on Windows
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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* i8254 security fix
* Avoid long 100% CPU wait after restarting guests that use the periodic timer
* Fixes for access clamping (WinXP, MIPS)
* wixl/.msi support for qemu-ga on Windows

# gpg: Signature made Fri Jun 19 11:30:53 2015 BST using RSA key ID 78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream:
  exec: clamp accesses against the MemoryRegionSection
  exec: do not clamp accesses to MMIO regions
  mc146818rtc: Reset the periodic timer on load
  qemu-timer: Call clock reset notifiers on forward jumps
  tests: virtio-scsi: Add test for unaligned WRITE SAME
  tests: virtio-scsi: Move start/stop to individual test functions
  libqos: Complete virtio device ID definition list
  libqos: Allow calling guest_free on NULL pointer
  tests: Link libqos virtio object to virtio-scsi-test
  i8254: fix out-of-bounds memory access in pit_ioport_read()
  qemu-ga: Building Windows MSI installation with configure/Makefile
  qemu-ga: Introduce Windows MSI script
  qemu-ga: debug printouts to help troubleshoot installation
  qemu-ga: adding vss-[un]install options
  qemu-log: Open file for logging when specified

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-22 11:50:08 +01:00
Alistair Francis ad7020a7e7 target-microblaze: Remove dead code
This code is already being run in the mb_cpu_realizefn()
function. As PVR registers are preserved on reset this
code is not required.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:16 +10:00
Alistair Francis 033af8e9aa s3adsp1800: Remove the hardcoded values from the reset
Remove the hardcoded values from the machine specific reset
function, as the same values are already set in the standard
MicroBlaze reset.

This also allows the entire reset function to be deleted, as
PVR registers are now preserved on reset.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:16 +10:00
Alistair Francis a87310a62d ml605_mmu: Move the hardcoded values to the init function
Move the hard coded register values to the init function.
This also allows the entire reset function to be deleted, as
PVR registers are now preserved on reset.

The hardcoded PVR0 values can be removed as they are setting
the endianness and stack protection, which is already done
or invalid.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:16 +10:00
Alistair Francis 6fad9e986b target-microblaze: Convert pvr-full to a CPU property
Originally the pvr-full PVR bits were manually set for each machine. This
is a hassle and difficult to read, instead set them based on the CPU
properties.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:16 +10:00
Alistair Francis 72e3875485 target-microblaze: Convert version_mask to a CPU property
Originally the version_mask PVR bits were manually set for each
machine. This is a hassle and difficult to read, instead set them
based on the CPU properties.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:16 +10:00
Alistair Francis a88bbb006a target-microblaze: Convert endi to a CPU property
Originally the endi PVR bits were manually set for each machine. This
is a hassle and difficult to read, instead set them based on the CPU
properties.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:16 +10:00
Alistair Francis a6c3ed2474 target-microblaze: Convert dcache-writeback to a CPU property
Originally  the dcache-writeback PVR bits were manually set for each machine.
This is a hassle and difficult to read, instead set them based on the CPU
properties.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:15 +10:00
Alistair Francis 7144612370 target-microblaze: Convert use-mmu to a CPU property
Originally the use-mmu PVR bits were manually set for each machine. This
is a hassle and difficult to read, instead set them based on the CPU
properties.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:15 +10:00
Alistair Francis be67e9ab97 target-microblaze: Rename the usefpu variable
Rename the usefpu variable to use_fpu.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:15 +10:00
Alistair Francis f44c475cb6 target-microblaze: Disable stack protection by default
Stack protection is not available when the MMU is enabled.
As the MMU is enabled by default, disable stack protection
by default.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:15 +10:00
Alistair Francis 4e5d45ae57 target-microblaze: Convert use-fpu to a CPU property
Originally the use-fpu PVR bits were manually set for each machine. This
is a hassle and difficult to read, instead set them based on the CPU
properties.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:15 +10:00
Alistair Francis f27183abaa target-microblaze: Tidy up the base-vectors property
Rename the "xlnx.base-vectors" string to "base-vectors" and
move the base_vectors variable into the cfg struct.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:15 +10:00
Alistair Francis 9aaaa18194 target-microblaze: Allow the stack protection to be disabled
Microblaze stack protection is configurable and isn't always enabled.
This patch allows the stack protection to be disabled from the
CPU properties.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:15 +10:00
Alistair Francis 8bac22423e target-microblaze: Preserve the pvr registers during reset
Move the Microblaze PVR registers to the end of the CPUMBState
and preserve them during reset. This is similar to what the
QEMU ARM model does with some of it's registers.

This allows the Microblaze PVR registers to only be set once
at realise instead of constantly at reset.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:15 +10:00
Alistair Francis 53432dc9ea target-microblaze: Fix up indentation
Fix up the incorrect indentation level in the helper_stackprot() function.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:15 +10:00
Peter Crosthwaite d87636b18f microblaze: s3adsp: Instantiate CPU using QOM
Instantiate and realise the CPU directly, rather than using
cpu_mb_init. Microblazes cpu_model argument is a dummy so remove the
default cpu_model set logic.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21 17:20:14 +10:00
Markus Armbruster daeba9699d qdev: Un-deprecate qdev_init_nofail()
It's a perfectly sensible helper function.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 19:14:32 +02:00
Markus Armbruster 0210afe669 qdev: Deprecated qdev_init() is finally unused, drop
qdev_init() is a wrapper around setting property "realized" to true,
plus error handling that passes errors to qerror_report_err().
qerror_report_err() is a transitional interface to help with
converting existing monitor commands to QMP.  It should not be used
elsewhere.

All code has been modernized to avoid qdev_init() and its
inappropriate error handling.  We can finally drop it.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 19:14:22 +02:00
Daniel P. Berrange a3590dacce qom: Don't pass string table to object_get_enum() function
Now that properties can be explicitly registered as an enum
type, there is no need to pass the string table to the
object_get_enum() function. The object property registration
already has a pointer to the string table.

In changing this method signature, the hostmem backend object
has to be converted to use the new enum property registration
code, which simplifies it somewhat.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 18:42:48 +02:00
Daniel P. Berrange a8e3fbedc8 qom: Add an object_property_add_enum() helper function
A QOM property can be parsed as enum using the visit_type_enum()
helper function, but this forces callers to use the more complex
generic object_property_add() method when registering it. It
also requires that users of that object have access to the
string map when they want to read the property value.

This patch introduces a specialized object_property_add_enum()
method which simplifies the use of enum properties, so the
setters/getters directly get passed the int value.

  typedef enum {
     MYDEV_TYPE_FROG,
     MYDEV_TYPE_ALLIGATOR,
     MYDEV_TYPE_PLATYPUS,

     MYDEV_TYPE_LAST
  } MyDevType;

Then provide a table of enum <-> string mappings

  static const char *const mydevtypemap[MYDEV_TYPE_LAST + 1] = {
     [MYDEV_TYPE_FROG] = "frog",
     [MYDEV_TYPE_ALLIGATOR] = "alligator",
     [MYDEV_TYPE_PLATYPUS] = "platypus",
     [MYDEV_TYPE_LAST] = NULL,
  };

Assuming an object struct of

   typedef struct {
      Object parent_obj;
      MyDevType devtype;
      ...other fields...
   } MyDev;

The property can then be registered as follows:

   static int mydev_prop_get_devtype(Object *obj,
                                     Error **errp G_GNUC_UNUSED)
   {
       MyDev *dev = MYDEV(obj);

       return dev->devtype;
   }

   static void mydev_prop_set_devtype(Object *obj,
                                      int value,
                                      Error **errp G_GNUC_UNUSED)
   {
       MyDev *dev = MYDEV(obj);

       dev->devtype = value;
   }

   object_property_add_enum(obj, "devtype",
                            mydevtypemap, "MyDevType",
                            mydev_prop_get_devtype,
                            mydev_prop_set_devtype,
                            NULL);

Note there is no need to check the range of 'value' in
the setter, because the string->enum conversion code will
have already done that and reported an error as required.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 18:42:18 +02:00
Daniel P. Berrange 2e4450ff43 qom: Make enum string tables const-correct
The enum string table parameters in various QOM/QAPI methods
are declared 'const char *strings[]'. This results in const
warnings if passed a variable that was declared as

   static const char * const strings[] = { .... };

Add the extra const annotation to the parameters, since
neither the string elements, nor the array itself should
ever be modified.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 18:42:18 +02:00
Daniel P. Berrange a31bdae5a7 qom: Add object_new_with_props() / object_new_withpropv() helpers
It is reasonably common to want to create an object, set a
number of properties, register it in the hierarchy and then
mark it as complete (if a user creatable type). This requires
quite a lot of error prone, verbose, boilerplate code to achieve.

First a pair of functions object_set_props() / object_set_propv()
are added which allow for a list of objects to be set in
one single API call.

Then object_new_with_props() / object_new_with_propv() constructors
are added which simplify the sequence of calls to create an
object, populate properties, register in the object composition
tree and mark the object complete, into a single method call.

Usage would be:

   Error *err = NULL;
   Object *obj;
   obj = object_new_with_propv(TYPE_MEMORY_BACKEND_FILE,
                               object_get_objects_root(),
                               "hostmem0",
                               &err,
                               "share", "yes",
                               "mem-path", "/dev/shm/somefile",
                               "prealloc", "yes",
                               "size", "1048576",
                               NULL);

Note all property values are passed in string form and will
be parsed into their required data types, using normal QOM
semantics for parsing from string format.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 18:42:18 +02:00
Daniel P. Berrange bc2256c4ae qom: Add helper function for getting user objects root
Add object_get_objects_root() function which is a convenience for
obtaining the Object * located at /objects in the object
composition tree. Convert existing code over to use the new
API where appropriate.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 18:40:00 +02:00
Daniel P. Berrange f08f9271bf vl: Create (most) objects before creating chardev backends
Some types of object must be created before chardevs, other types of
object must be created after chardevs. As such there is no option but
to create objects in two phases.

This takes the decision to create as many object types as possible
right away before anyother backends are created, and only delay
creation of those few which have an explicit dependency on the
chardevs. Hopefully the set which need delaying will remain small
over time.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 18:37:20 +02:00
Daniel P. Berrange b9174d4f25 doc: Document user creatable object types in help text
The QEMU help for -object is essentially useless, just giving users
the generic syntax. Move it down into its own section and introduce
a nested table where each user creatable object can be documented.
The existing memory-backend-file, rng-random and rng-egd object
types are documented.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 18:37:13 +02:00
Daniel P. Berrange b1028b4e86 backends: Fix typename of 'policy' enum property in hostmem obj
The 'policy' property was being registered with a typename of
'str', but it is in fact an enum of the 'HostMemPolicy' type.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19 18:36:56 +02:00
Peter Maydell 799810fb28 target-arm queue:
* support --semihosting-config,arg=value
  * Cortex-R5 support (including implementing them on the Zynq board)
  * Cortex-M4 support (without FPU)
  * enable vfio-calxeda-xgmac
  * don't reset ALIAS sysregs
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150619' into staging

target-arm queue:
 * support --semihosting-config,arg=value
 * Cortex-R5 support (including implementing them on the Zynq board)
 * Cortex-M4 support (without FPU)
 * enable vfio-calxeda-xgmac
 * don't reset ALIAS sysregs

# gpg: Signature made Fri Jun 19 14:41:54 2015 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-target-arm-20150619:
  semihosting: add --semihosting-config arg sub-argument
  semihosting: create SemihostingConfig structure and semihost.h
  arm: xlnx-zynqmp: Add 2xCortexR5 CPUs
  arm: xlnx-zynqmp: Add boot-cpu property
  arm: xlnx-zynqmp: Preface CPU variables with "apu"
  target-arm: Add support for Cortex-R5
  target-arm: Implement PMSAv7 MPU
  target-arm: Add registers for PMSAv7
  target-arm/helper.c: define MPUIR register
  target-arm: Do not reset sysregs marked as ALIAS
  hw/arm/sysbus-fdt: enable vfio-calxeda-xgmac dynamic instantiation
  target-arm: Add the Cortex-M4 CPU

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 17:05:15 +01:00
Leon Alrae a59d31a1eb semihosting: add --semihosting-config arg sub-argument
Add new "arg" sub-argument to the --semihosting-config allowing the user
to pass multiple input arguments separately. It is required for example
by UHI semihosting to construct argc and argv.

Also, update ARM semihosting to support new option (at the moment it is
the only target which cares about arguments).

If the semihosting is enabled and no semihosting args have been specified,
then fall back to -kernel/-append. The -append string is split on whitespace
before initializing semihosting.argv[1..n]; this is different from what
QEMU MIPS machines' pseudo-bootloaders do (i.e. argv[1] contains the whole
-append), but is more intuitive from UHI user's point of view and Linux
kernel just does not care as it concatenates argv[1..n] into single cmdline
string anyway.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Message-id: 1434643256-16858-3-git-send-email-leon.alrae@imgtec.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:45 +01:00
Leon Alrae cfe67cef48 semihosting: create SemihostingConfig structure and semihost.h
Remove semihosting_enabled and semihosting_target and replace them with
SemihostingConfig structure containing equivalent fields. The structure
is defined in vl.c where it is actually set.

Also introduce separate header file include/exec/semihost.h allowing to
access semihosting config related stuff from target specific semihosting
code.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1434643256-16858-2-git-send-email-leon.alrae@imgtec.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:45 +01:00
Peter Crosthwaite b58850e79d arm: xlnx-zynqmp: Add 2xCortexR5 CPUs
Add the 2xCortexR5 CPUs to zynqmp board. They are powered off on reset
(this is true of real hardware) by default or selectable as the boot
processor.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: da34128c73ca13fc4f8c3293e1a33d1e1e345655.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:45 +01:00
Peter Crosthwaite 6396a193d3 arm: xlnx-zynqmp: Add boot-cpu property
Add a string property that specifies the primary boot cpu. All CPUs
except the one selected will start-powered-off. This allows for elf
boots on any CPU, which prepares support for booting R5 elfs directly
on the R5 processors.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 53331c00d80c7ce9c6a83712348773f1b38fae2b.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:45 +01:00
Peter Crosthwaite 2e5577bc55 arm: xlnx-zynqmp: Preface CPU variables with "apu"
The CPUs currently supported by zynqmp are the APU (application
processing unit) CPUs. There are other CPUs in Zynqmp so unqualified
"cpus" in ambiguous. Preface the variables with "APU" accordingly, to
prepare support adding the RPU (realtime processing unit) processors.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: ce32287fc365aea898465e981da3546a227e0811.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:45 +01:00
Peter Crosthwaite d6a6b13ea1 target-arm: Add support for Cortex-R5
Introduce a CPU model for the Cortex R5 processor. ARMv7 with MPU,
and both thumb and ARM div instructions.

Also implement dummy ATCM and BTCM. These CPs are defined for R5 but
don't have a lot of meaning in QEMU yet. Raz them so the guest can
proceed if they are read. The TCM registers will return a size of 0,
indicating no TCM.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: efe213163e6800578494aba864ac30329de4d396.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:45 +01:00
Peter Crosthwaite f6bda88ff8 target-arm: Implement PMSAv7 MPU
Unified MPU only. Uses ARM architecture major revision to switch
between PMSAv5 and v7 when ARM_FEATURE_MPU is set. PMSA v6 remains
unsupported and is asserted against.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: dcb03cda6dd754c5cc6a962fa11f25089811e954.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:45 +01:00
Peter Crosthwaite 6cb0b013a1 target-arm: Add registers for PMSAv7
Define the arm CP registers for PMSAv7 and their accessor functions.
RGNR serves as a shared index that indexes into arrays storing the
DRBAR, DRSR and DRACR registers. DRBAR and friends have to be VMSDd
separately from the CP interface using a new PMSA specific VMSD
subsection.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 172cf135fbd8f5cea413c00e71cc1c3cac704744.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:44 +01:00
Peter Crosthwaite 3281af8114 target-arm/helper.c: define MPUIR register
Define the MPUIR register for MPU supporting ARMv6 and onwards.
Currently we only support unified MPU.

The size of the unified MPU is defined via the number of "dregions".
So just a single config is added to specify this size. (When split MPU
is implemented we will add an extra iregions config).

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 9f248950b803a08c8b3c978931663182f7e882e7.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:44 +01:00
Sergey Fedorov b061a82b8a target-arm: Do not reset sysregs marked as ALIAS
cp_reg_reset() is called from g_hash_table_foreach() which does not
define a specific ordering of the hash table iteration. Thus doing reset
for registers marked as ALIAS would give an ambiguous result when
resetvalue is different for original and alias registers. Exit
cp_reg_reset() early when passed an alias register. Then clean up alias
register definitions from needless resetvalue and resetfn.

In particular, this fixes a bug in the handling of the PMCR register,
which had different resetvalues for its 32 and 64-bit views.

Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1434554713-10220-1-git-send-email-serge.fdrv@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:44 +01:00
Eric Auger decf4f807b hw/arm/sysbus-fdt: enable vfio-calxeda-xgmac dynamic instantiation
This patch allows the instantiation of the vfio-calxeda-xgmac device
from the QEMU command line (-device vfio-calxeda-xgmac,host="<device>").

A specialized device tree node is created for the guest, containing
compat, dma-coherent, reg and interrupts properties.

Signed-off-by: Eric Auger <eric.auger@linaro.org>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1434455898-17895-1-git-send-email-eric.auger@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:44 +01:00
Aurelio C. Remonda ba890a9b25 target-arm: Add the Cortex-M4 CPU
This patch adds the Cortex-M4 CPU. The M4 is basically the same as
the M3, the main differences being the DSP instructions and an
optional FPU.  Only no-FPU cortex-M4 is implemented here, cortex-M4F
is not because the core target-arm code doesn't support the M-profile
FPU model yet.

Signed-off-by: Aurelio C. Remonda <aurelioremonda@gmail.com>
Message-id: 1434461850-4104-1-git-send-email-aurelioremonda@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 14:17:44 +01:00
Peter Maydell ffdb1409a7 cocoa queue:
* Add Machine menu, with entries for pause, resume, reset, power down, and
    media change and eject for removable drives
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-cocoa-20150619-1' into staging

cocoa queue:
 * Add Machine menu, with entries for pause, resume, reset, power down, and
   media change and eject for removable drives

# gpg: Signature made Fri Jun 19 11:24:11 2015 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-cocoa-20150619-1:
  ui/cocoa.m: Add machine menu items to change and eject removable drive media
  ui/cocoa.m: Add Reset and Power Down menu items to Machine menu
  ui/cocoa.m: Add Machine menu with pause and resume menu items

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 12:54:08 +01:00
Peter Maydell 89e9429c3c virtio, pci fixes, enhancements
Most notably this includes virtio cross-endian patches.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

virtio, pci fixes, enhancements

Most notably this includes virtio cross-endian patches.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Fri Jun 19 11:18:05 2015 BST using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"

* remotes/mst/tags/for_upstream:
  vhost: enable vhost without without MSI-X
  pci: Don't register a specialized 'config_write' if default behavior is intended
  hw/core: rebase sysbus_get_fw_dev_path() to g_strdup_printf()
  vhost_net: re-enable when cross endian
  vhost-net: tell tap backend about the vnet endianness
  tap: fix non-linux build
  tap: add VNET_LE/VNET_BE operations
  vhost: set vring endianness for legacy virtio
  virtio: introduce virtio_legacy_is_cross_endian()
  linux-headers: sync vhost.h
  vhost-user: part of virtio

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19 11:30:57 +01:00