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204 Commits

Author SHA1 Message Date
ths 6d35524c40 Improved PABITS handling, and config register fixes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3855 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-25 03:13:56 +00:00
bellard aaed909a49 added cpu_model parameter to cpu_init() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-10 15:15:54 +00:00
ths 7df526e317 Move kernel loader parameters from the cpu state to being board specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3557 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-09 17:52:11 +00:00
ths 623a930ec3 Implement missing MIPS supervisor mode bits. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 19:45:05 +00:00
ths 647de6ca24 Handle IBE on MIPS properly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 19:45:44 +00:00
j_mayer 6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
j_mayer c732abe222 Unify '-cpu ?' option. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-12 06:47:46 +00:00
ths 198a74de4c Move get_sp_from_cpustate from cpu.h to target_signal.h. 
Enable sigaltstack processing for more architectures.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 16:44:32 +00:00
ths a04e134ad1 linux-user sigaltstack() syscall, by Thayne Harbaugh. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 13:57:58 +00:00
ths 387a8fe505 Optimise instructions accessing CP0, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3235 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-25 14:49:47 +00:00
ths e189e74868 Per-CPU instruction decoding implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-24 12:48:00 +00:00
ths ead9360e2f Partial support for 34K multithreading, not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-06 00:18:15 +00:00
ths e034e2c39a Handle MIPS64 SEGBITS value correctly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-23 18:04:12 +00:00
ths 9467d44c4d Move target-specific defines to the target directories. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-03 21:02:38 +00:00
ths 33ac7f1630 Don't kill the registered irqs on reset. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2903 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 16:18:58 +00:00
ths 51b2772f28 Fix CPU (re-)selection on reset. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-30 20:46:02 +00:00
ths 78749ba859 Fix usermode check, thanks Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2897 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 18:55:34 +00:00
ths 5e755519ac Don't check the FPU state for each FPU instruction, use hflags to 
handle this per-tb.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 16:52:57 +00:00
ths 6e473128b6 Handle PX/UX status flags correctly, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 20:36:48 +00:00
ths fd88b6abab The 24k wants more watch and srsmap registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:24:25 +00:00
ths fd4a04ebb2 - Move FPU exception handling into helper functions, since they are big. 
- Fix FP-conditional branches.
- Check FPU register mode at runtime, not translation time, as the F64
  status bit can change.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 11:55:54 +00:00
ths 388bb21af6 MIPS linux-user update. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2810 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 13:58:00 +00:00
ths 29929e3490 MIPS TLB style selection at runtime, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 13:49:44 +00:00
ths 5a5012ecbd MIPS 64-bit FPU support, plus some collateral bugfixes in the 
conditional branch handling.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-07 13:55:33 +00:00
ths fcb4a419f5 Choose number of TLBs at runtime, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-17 15:26:47 +00:00
pbrook d537cf6c86 Unify IRQ handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 18:14:41 +00:00
ths f7cfb2a176 64bit MIPS FPUs have 32 registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2610 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:14:23 +00:00
ths 36bb244bd3 Fix typo, suggested by Ben Taylor. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2548 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 18:42:21 +00:00
ths 24c7b0e330 Sanitize mips exception handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 16:44:54 +00:00
ths e397ee3382 Fix enough FPU/R2 support to get 24Kf going. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-23 00:43:28 +00:00
ths 33d68b5f00 MIPS -cpu selection support, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-18 00:30:29 +00:00
ths 6f5b89a07c MIPS Userland TLS register emulation, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2465 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-02 20:48:00 +00:00
ths 36d2395873 MIPS FPU dynamic activation, part 1, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-28 22:37:42 +00:00
ths 3594c77487 Replace TLSZ with TARGET_FMT_lx. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2444 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-20 23:37:21 +00:00
ths b29a0341d7 EBase is limited to KSEG0/KSEG1 even on 64bit CPUs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2351 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-24 18:01:23 +00:00
ths 4de9b249d3 Reworking MIPS interrupt handling, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-24 01:47:51 +00:00
ths 9c2149c8e0 Implementing dmfc/dmtc. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2348 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-23 22:45:22 +00:00
ths 3b1c8be4f4 Fix PageMask handling, second part. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2345 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-22 20:50:42 +00:00
ths 9042c0e20d Check ELF binaries for machine type and endianness. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2274 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-23 14:18:40 +00:00
ths 5dc4b74480 Scrap SIGN_EXTEND32. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2251 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-21 13:48:28 +00:00
ths c570fd169c Preliminiary MIPS64 support, disabled by default due to performance impact. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-21 01:19:56 +00:00
ths 7a387fffce Add MIPS32R2 instructions, and generally straighten out the instruction 
decoding. This is also the first percent towards MIPS64 support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 20:17:30 +00:00
ths 6ae817752b Halt/reboot support for Linux, by Daniel Jacobowitz. This is a band-aid 
until we emulate real MIPS hardware with real firmware.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2221 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:48:52 +00:00
ths 814b9a4749 MIPS TLB performance improvements, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:42:40 +00:00
bellard fdbb46910a Solaris/SPARC host port (Ben Taylor) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1979 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 17:32:25 +00:00
bellard 43057ab127 use constants for TLB handling (Thiemo Seufer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1978 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 17:15:19 +00:00
bellard c5d6edc3fc mips config fixes (initial patch by Stefan Weil) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1977 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 16:49:24 +00:00
bellard 6ea83fedc8 MIPS FPU support (Marius Goeger) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 12:56:19 +00:00
pbrook 56b194039e Rename MIPS_HFLAG(S)_TMASK (Thiemo Seufer). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1775 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-03-11 16:23:39 +00:00
pbrook 98c1b82b6c e bitfields in mips TLB structures (Thiemo Seufer). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1774 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-03-11 16:20:36 +00:00
bellard 4ad40f366f MIPS fixes (Daniel Jacobowitz) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1690 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-12-05 19:59:36 +00:00
bellard a316d3353c added CPU_COMMON and CPUState.tb_jmp_cache[] 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-20 10:32:34 +00:00
bellard e37e863f5e correct split between helper.c and op_helper.c - cosmetics 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1505 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-04 22:17:33 +00:00
bellard 6af0bf9c7c MIPS target (Jocelyn Mayer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1464 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-02 14:58:51 +00:00