OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity
22,781 Commits 10 Branches 0 Tags 459 MiB
Commit Graph

13 Commits

Author SHA1 Message Date
Avi Kivity a8170e5e97 Rename target_phys_addr_t to hwaddr 
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific).  Replace it with a finger-friendly,
standards conformant hwaddr.

Outstanding patchsets can be fixed up with the command

  git rebase -i --exec 'find -name "*.[ch]"
                        | xargs s/target_phys_addr_t/hwaddr/g' origin

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
 2012-10-23 08:58:25 -05:00
Richard Henderson fdefe51c28 Emit debug_insn for CPU_LOG_TB_OP_OPT as well. 
For all targets that currently call tcg_gen_debug_insn_start,
add CPU_LOG_TB_OP_OPT to the condition that gates it.

This is useful for comparing optimization dumps, when the
pre-optimization dump is merely noise.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2012-09-27 21:38:50 +02:00
Jia Liu d962783e98 target-or32: Add linux user support 
Add QEMU OpenRISC linux user support.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:13:05 +00:00
Jia Liu 4dd044c6ba target-or32: Add system instructions 
Add OpenRISC system instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:13:03 +00:00
Jia Liu 99f575edcc target-or32: Add timer support 
Add OpenRISC timer support.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:13:02 +00:00
Jia Liu dd29c7fb01 target-or32: Add PIC support 
Add OpenRISC Programmable Interrupt Controller support.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:13:01 +00:00
Jia Liu bbe418f25d target-or32: Add instruction translation 
Add OpenRISC instruction tanslation routines.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:13:00 +00:00
Jia Liu 5b5695073b target-or32: Add float instruction helpers 
Add OpenRISC float instruction helpers.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:13:00 +00:00
Jia Liu e54a5aff13 target-or32: Add int instruction helpers 
Add OpenRISC int instruction helpers.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:12:59 +00:00
Jia Liu 1d7d403469 target-or32: Add exception support 
Add OpenRISC exception support.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:12:58 +00:00
Jia Liu b6a71ef7e0 target-or32: Add interrupt support 
Add OpenRISC interrupt support.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:12:57 +00:00
Jia Liu 726fe04572 target-or32: Add MMU support 
Add OpenRISC MMU support.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:12:56 +00:00
Jia Liu e67db06e9f target-or32: Add target stubs and QOM cpu 
Add OpenRISC target stubs, QOM cpu and basic machine.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:12:55 +00:00