Richard Henderson
2ef6175aa7
tcg: Invert the inclusion of helper.h
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Rather than include helper.h with N values of GEN_HELPER, include a
secondary file that sets up the macros to include helper.h. This
minimizes the files that must be rebuilt when changing the macros
for file N.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28 09:33:54 -07:00
Juan Quintela
35d08458a9
savevm: Remove all the unneeded version_minimum_id_old (rest)
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After previous Peter patch, they are redundant. This way we don't
assign them except when needed. Once there, there were lots of case
where the ".fields" indentation was wrong:
.fields = (VMStateField []) {
and
.fields = (VMStateField []) {
Change all the combinations to:
.fields = (VMStateField[]){
The biggest problem (appart from aesthetics) was that checkpatch complained
when we copy&pasted the code from one place to another.
Signed-off-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-14 15:24:51 +02:00
Richard Henderson
214bb280c6
target-alpha: Fix RDUSP
...
Commit 06ef8604e9
contained a typo.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-02 20:42:02 -07:00
Richard Henderson
06ef8604e9
target-alpha: Remove cpu_unique, cpu_sysval, cpu_usp
...
Technically, these variables could have been referenced both via
offsets from env and as TCG registers, which would be illegal.
Of course, that could only be done from PALcode, and ours doesn't
do that.
But honestly, these are used infrequently enough that they don't
really need to be TCG registers. We wind up with exactly the same
code if we follow the letter of the law and issue explicit ld/st.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
39acc64741
target-alpha: Tidy alpha_translate_init
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
e566be049a
target-alpha: Don't issue goto_tb under singlestep
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
8f811b9a4a
target-alpha: Use non-local temps for zero/sink
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These values are no longer live across branches.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
a9e05a1ceb
target-alpha: Use extract to get insn fields
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
0e154fe92c
target-alpha: Convert mfpr/mtpr to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
ef3765cb95
target-alpha: Convert gen_cpys et al to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
e8d8fef48f
target-alpha: Convert gen_fcvtlq/ql to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
6580935246
target-alpha: Convert gen_fcmov to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
76bff4f82f
target-alpha: Convert gen_bcond to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
e20b8c04a3
target-alpha: Convert most ieee insns to source/sink
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This one fixes a bug, previously noted as supressing exceptions
in the (unlikely) case the destination register was $f31.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
8b0190bbde
target-alpha: Convert gen_ieee_input to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
f477ed3c11
target-alpha: Convert MVIOP2 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
cd2754addc
target-alpha: Convert ARITH3 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
3d045dbca5
target-alpha: Convert FARITH3 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
baee04abba
target-alpha: Convert FARITH2 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
b144be9e06
target-alpha: Convert gen_zap/not to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
5e5863ecf1
target-alpha: Convert gen_ins_h/l to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
9a734d64f9
target-alpha: Convert gen_ext_h/l to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson
9a8fa1bdad
target-alpha: Convert gen_msk_h/l to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
83ebb7cd01
target-alpha: Convert gen_cmov to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
42774a56ec
target-alpha: Convert ARITH3_EX to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
958683482c
target-alpha: Convert gen_cmp to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
cd2d46fd21
target-alpha: Convert gen_store_conditional to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
595b8fdd54
target-alpha: Convert gen_load/store_mem to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
a4af30447b
target-alpha: Convert opcode 0x1F to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
46010969f3
target-alpha: Convert opcode 0x1E to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
c67b67e511
target-alpha: Convert opcode 0x1C to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
1eaa1da7e4
target-alpha: Convert opcode 0x1B to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
8f56ced8aa
target-alpha: Convert opcode 0x1A to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
89fe090bb3
target-alpha: Convert opcode 0x18 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
6b88b37c0e
target-alpha: Convert opcode 0x17 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
075b8ddb9b
target-alpha: Convert opcode 0x14 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
de4d3555fa
target-alpha: Convert opcode 0x13 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
3bd67b7dab
target-alpha: Convert opcode 0x12 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
db4a16458c
target-alpha: Convert opcode 0x11 to source/sink
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson
194cfb43d5
target-alpha: Introduce functions for source/sink
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This will allow cleaner handling of $31 and $f31.
Convert opcodes 0x08, 0x09, 0x10 as examples.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:40 -07:00
Richard Henderson
64f45e4991
target-alpha: Introduce REQUIRE_REG_31
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We were missing quite a few checks for Ra or Rb required to be 31.
Further, the one place we did check we also checked for no literal
operand and the Handbook says nothing about that.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:40 -07:00
Richard Henderson
5238c88657
target-alpha: Introduce REQUIRE_TB_FLAG
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The methods by which we check for cpu features varied wildly
across the function. Using a nice macro cleans this up.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:40 -07:00
Paolo Bonzini
67debe3ae5
target-alpha: fix the braces
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Conform to coding style, and avoid further occurrences of bugs due to
misplaced braces.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:40 -07:00
Paolo Bonzini
83d1c8ae88
target-alpha: fix subl and s8subl indentation
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Two missing braces, one close and one open, fabulously let the code
compile.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-03-17 13:21:12 +01:00
Andreas Färber
0c591eb0a9
cputlb: Change tlb_set_page() argument to CPUState
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Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:47 +01:00
Andreas Färber
00c8cb0a36
cputlb: Change tlb_flush() argument to CPUState
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Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:47 +01:00
Andreas Färber
31b030d4ab
cputlb: Change tlb_flush_page() argument to CPUState
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Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:47 +01:00
Andreas Färber
a47dddd734
exec: Change cpu_abort() argument to CPUState
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Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:28 +01:00
Andreas Färber
3f38f309b2
translate-all: Change cpu_restore_state() argument to CPUState
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This lets us drop some local variables in tlb_fill() functions.
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:47 +01:00
Andreas Färber
5638d180d6
cpu-exec: Change cpu_loop_exit() argument to CPUState
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Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:47 +01:00