Commit Graph

16 Commits

Author SHA1 Message Date
Peter Maydell 8fd9dece65 microblaze: Clean up includes
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.

This commit was created with scripts/clean-includes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1453831531-667-3-git-send-email-peter.maydell@linaro.org
2016-01-28 11:13:13 +00:00
Paolo Bonzini 1d512a65ac microblaze: avoid "naked" qemu_log
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-12-17 17:33:48 +01:00
Benjamin Herrenschmidt 97ed5ccdee tlb: Add "ifetch" argument to cpu_mmu_index()
This is set to true when the index is for an instruction fetch
translation.

The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS
acessors.

All targets ignore it for now, and all other callers pass "false".

This will allow targets who wish to split the mmu index between
instruction and data accesses to do so. A subsequent patch will
do just that for PowerPC.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-11 08:15:28 -07:00
Andreas Färber 00c8cb0a36 cputlb: Change tlb_flush() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:47 +01:00
Andreas Färber 31b030d4ab cputlb: Change tlb_flush_page() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:47 +01:00
Peter Maydell e03ba13637 Typo, spelling and grammatical fixes
Minor fixes to documentation and code comments.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-04-12 14:33:20 +02:00
Peter A. G. Crosthwaite dadc1064c3 target-microblaze: added PetaLogix copyright
Microblaze cpu development has been driven and funded by PetaLogix. Added (c)
PetaLogix line accordingly.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-04-12 09:56:51 +02:00
Andreas Färber 68cee38a9c target-microblaze: Don't overuse CPUState
Scripted conversion:
  sed -i "s/CPUState/CPUMBState/g" target-microblaze/*.[hc]
  sed -i "s/#define CPUMBState/#define CPUState/" target-microblaze/cpu.h

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:25 +01:00
Stefan Weil 94598c1d95 target-microblaze: Clean includes
The change in cpu.h is needed when HOST_LONG_BITS is defined in qemu-common.h.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-02-28 22:33:42 +01:00
Blue Swirl 2b41f10e18 Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:35 +00:00
Blue Swirl 183aa45407 microblaze: remove dead assignments, spotted by clang analyzer
Value stored is never read.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-25 20:00:33 +00:00
Edgar E. Iglesias 3c50a71fc9 microblaze: MMU shows more respect to synthesis config.
The microblaze MMU can be synthesized in different configurations.
Have the MMU model show more respect to the chosen configuration.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-09-03 13:04:02 +02:00
Blue Swirl 8167ee8839 Update to a hopefully more future proof FSF address
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 20:47:01 +00:00
Edgar E. Iglesias d0f3654f83 microblaze: Make writes to MMU_ZPR flush the TLB.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-05-27 01:19:58 +02:00
Edgar E. Iglesias 6b2fce907d microblaze: Correct typo.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-05-27 01:10:26 +02:00
Edgar E. Iglesias afeeceb0d7 microblaze: Add MMU emulation.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-05-26 21:10:34 +02:00