Commit Graph

132 Commits

Author SHA1 Message Date
Michael Clark ea10325917
RISC-V Disassembler
The RISC-V disassembler has no dependencies outside of the 'disas'
directory so it can be applied independently. The majority of the
disassembler is machine-generated from instruction set metadata:

- https://github.com/michaeljclark/riscv-meta

Expected checkpatch errors for consistency and brevity reasons:

ERROR: line over 90 characters
ERROR: trailing statements should be on next line
ERROR: space prohibited between function name and open parenthesis '('

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07 08:30:28 +13:00
Peter Maydell 82de978a8b target/xtensa updates:
- make mini-bootloader independent of the initial CPU state;
 - add noMMU XTFPGA variants;
 - add two noMMU cores: de212 and sample_controller;
 - fix issues reported by coverity against xtensa translator and disassembler.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaZkLBAAoJEFH5zJH4P6BE6mIQAJT1hjEhfgm3xiGfVJZYGo34
 Eo/KeyKC7QOUbr0R+E+J3h2yxSXWYbweoAZvFXkH5V4w/fhdvrCXZPVvDW0QjYY/
 wG0h+YfV/8cgVxq8AiaPHie//bLhKvJKpqH4A0HnCE4pBcslKwjOtFcG20RfOgk8
 PeQSa15QsyhOtTgdlg8rdRDECL6Lm8mXTWtOdxx8HQsl73REmNgkOZzQDSK6D5gM
 EcAJQTCcPNoDKblJKae/msSG/Vbv3PxECGaj6B72pKDSUW5Z/OqzxXDnwWXQyOgu
 q1WoPwL5U0u7uH5JE5wdD0EqwypQAbMAuzFTsove5pQlaCWdxDJzK+74NFOh6BcL
 JmLZbA4UIlA19KXiZdNKRbeH5O1U1E9xBe0wxLsqVagrwkBfpRAhI3MG1qZE1Id3
 3O6qsk26ATBGmJgTb80Wk1lPKZgKzdgcCJpzj+nz7slXp4uIQ6R3rU+6huONsGNJ
 bvz+25RAMzbFLd1l0sDsEegxmQ2BqC2Y8JqO5EKgKtT72Aooax3X6pWc8GCPuwxd
 1MCoi/ZfDcYQXNS++A3hpiKI6+qrn2t51TuyB2aUnHXtFrhlBDN1W+d+tcxl23gr
 pHIaOKbZ0nL1TmUOklAZicFMoxbDz1uebqetNS3OIYkpmuf7hMrAnKkbXUeqq9qo
 gy8+yJrXbEWPHeWZ4MtX
 =qf0K
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/xtensa/tags/20180122-xtensa' into staging

target/xtensa updates:

- make mini-bootloader independent of the initial CPU state;
- add noMMU XTFPGA variants;
- add two noMMU cores: de212 and sample_controller;
- fix issues reported by coverity against xtensa translator and disassembler.

# gpg: Signature made Mon 22 Jan 2018 20:00:01 GMT
# gpg:                using RSA key 0x51F9CC91F83FA044
# gpg: Good signature from "Max Filippov <filippov@cadence.com>"
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>"
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>"
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20180122-xtensa:
  target/xtensa: disas/xtensa: fix coverity warnings
  target/xtensa: add sample_controller core
  target/xtensa: allow different default CPU for MMU/noMMU
  target/xtensa: add de212 core
  hw/xtensa/xtfpga: support noMMU cores
  hw/xtensa/xtfpga: extract flash configuration
  hw/xtensa: extract xtensa_create_memory_regions
  target/xtensa: fix default sysrom/sysram addresses
  hw/xtensa/xtfpga: clean up function/structure names
  hw/xtensa/xtfpga: rewrite mini bootloader

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-24 16:59:36 +00:00
Max Filippov 847a647320 target/xtensa: disas/xtensa: fix coverity warnings
Coverity warnings CID 1385146, 1385148 1385149 and 1385150 point that
xtensa_opcode_num_operands and xtensa_format_num_slots may return -1
even when xtensa_opcode_decode and xtensa_format_decode succeed. In that
case unsigned counters used to iterate through operands/slots will not
do the right thing.
Make counters and loop bounds signed to fix the warnings.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-01-22 11:54:58 -08:00
Marc-André Lureau 02a2ad217b disas/s390: fix global-buffer-overflow
Spotted thanks to ASAN:

==25226==ERROR: AddressSanitizer: global-buffer-overflow on address 0x556715a1f120 at pc 0x556714b6f6b1 bp 0x7ffcdfac1360 sp 0x7ffcdfac1350
READ of size 1 at 0x556715a1f120 thread T0
    #0 0x556714b6f6b0 in init_disasm /home/elmarco/src/qemu/disas/s390.c:219
    #1 0x556714b6fa6a in print_insn_s390 /home/elmarco/src/qemu/disas/s390.c:294
    #2 0x55671484d031 in monitor_disas /home/elmarco/src/qemu/disas.c:635
    #3 0x556714862ec0 in memory_dump /home/elmarco/src/qemu/monitor.c:1324
    #4 0x55671486342a in hmp_memory_dump /home/elmarco/src/qemu/monitor.c:1418
    #5 0x5567148670be in handle_hmp_command /home/elmarco/src/qemu/monitor.c:3109
    #6 0x5567148674ed in qmp_human_monitor_command /home/elmarco/src/qemu/monitor.c:613
    #7 0x556714b00918 in qmp_marshal_human_monitor_command /home/elmarco/src/qemu/build/qmp-marshal.c:1704
    #8 0x556715138a3e in do_qmp_dispatch /home/elmarco/src/qemu/qapi/qmp-dispatch.c:104
    #9 0x556715138f83 in qmp_dispatch /home/elmarco/src/qemu/qapi/qmp-dispatch.c:131
    #10 0x55671485cf88 in handle_qmp_command /home/elmarco/src/qemu/monitor.c:3839
    #11 0x55671514e80b in json_message_process_token /home/elmarco/src/qemu/qobject/json-streamer.c:105
    #12 0x5567151bf2dc in json_lexer_feed_char /home/elmarco/src/qemu/qobject/json-lexer.c:323
    #13 0x5567151bf827 in json_lexer_feed /home/elmarco/src/qemu/qobject/json-lexer.c:373
    #14 0x55671514ee62 in json_message_parser_feed /home/elmarco/src/qemu/qobject/json-streamer.c:124
    #15 0x556714854b1f in monitor_qmp_read /home/elmarco/src/qemu/monitor.c:3881
    #16 0x556715045440 in qemu_chr_be_write_impl /home/elmarco/src/qemu/chardev/char.c:172
    #17 0x556715047184 in qemu_chr_be_write /home/elmarco/src/qemu/chardev/char.c:184
    #18 0x55671505a8e6 in tcp_chr_read /home/elmarco/src/qemu/chardev/char-socket.c:440
    #19 0x5567150943c3 in qio_channel_fd_source_dispatch /home/elmarco/src/qemu/io/channel-watch.c:84
    #20 0x7fb90292b90b in g_main_dispatch ../glib/gmain.c:3182
    #21 0x7fb90292c7ac in g_main_context_dispatch ../glib/gmain.c:3847
    #22 0x556715162eca in glib_pollfds_poll /home/elmarco/src/qemu/util/main-loop.c:214
    #23 0x556715163001 in os_host_main_loop_wait /home/elmarco/src/qemu/util/main-loop.c:261
    #24 0x5567151631fa in main_loop_wait /home/elmarco/src/qemu/util/main-loop.c:515
    #25 0x556714ad6d3b in main_loop /home/elmarco/src/qemu/vl.c:1950
    #26 0x556714ade329 in main /home/elmarco/src/qemu/vl.c:4865
    #27 0x7fb8fe5c9009 in __libc_start_main (/lib64/libc.so.6+0x21009)
    #28 0x5567147af4d9 in _start (/home/elmarco/src/qemu/build/s390x-softmmu/qemu-system-s390x+0xf674d9)

0x556715a1f120 is located 32 bytes to the left of global variable 'char_hci_type_info' defined in '/home/elmarco/src/qemu/hw/bt/hci-csr.c:493:23' (0x556715a1f140) of size 104
0x556715a1f120 is located 8 bytes to the right of global variable 's390_opcodes' defined in '/home/elmarco/src/qemu/disas/s390.c:860:33' (0x556715a15280) of size 40600

This fix is based on Andreas Arnez <arnez@linux.vnet.ibm.com> upstream
commit:
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff;h=9ace48f3d7d80ce09c5df60cccb433470410b11b

2014-08-19  Andreas Arnez  <arnez@linux.vnet.ibm.com>

       * s390-dis.c (init_disasm): Simplify initialization of
       opc_index[].  This also fixes an access after the last element
       of s390_opcodes[].

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20180104160523.22995-19-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-16 14:54:50 +01:00
Peter Maydell 76302a95e7 target/xtensa updates:
- add libisa to the xtensa target;
 - change xtensa instruction translator to use it;
 - switch existing xtensa cores to use it;
 - add support for a number of instructions: salt/saltu, const16,
   GPIO32 group, debug mode and MMU-related;
 - add disassembler for Xtensa.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaVQW2AAoJEFH5zJH4P6BEQ4EP/01BnD+SoHkDDRx8O59RgvUa
 r4kkJIqRNpObzzjhoHmh9RbGstir9r1u3ZYKbdlhPgZWK/ItUVzS8yJp8KcQ8x4B
 Z+4JzwX82PwAvvVdP7TD6iB23jqgUcoEdCtpaUb1jsK0tyvVHwIHnwF3qINY6Nsn
 yIzmupdIc47MEFlQNSxF/ZuvQI6CT8uDFuRJlK02dv8lEozUXCi9UHotICnqOybY
 ezgXCoMrOv7UqBdSEX7SQHvs5CD8zRbfhrwpeMc59YsbWp4j5JmQi1QI2ihFHyDN
 wp5vBDMI31SRdIqpEJiNEP5J+VnVg2oaJZcFP12JGXfTvSyB2WWSfqvQX+go394r
 4NbWu1rA/a0vQVUfI7xVqY9mXqGnRbDS01ILYHbjRl14o7kZY0IpX2UIoGXI2eO9
 toC+shIv/yNIJoaTlQf3ER+0nUvNFEGbBq3LNB+dlom8yqv7UY2LgpRy4zGqEfyL
 bB4pfEkaZVqP8vAJeq0TALMTmpvPjgFs1XxnHJAcpoAF3NM8dHiuGpO3li1jPiVu
 ZxN/8rWSWdJX7IvXFmu3Cy2ogLpdTxsTPIdtpKc+OLHNW6b5wx28Godig7JlfNil
 8p9F1t6ZNvs4fPM2JFWP9VTXhzSuynWYz/UEr1+OF7vxni/x7dgrX2h9Houx36/e
 3fn34SXgQUqhgtN+8BFR
 =PNwZ
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/xtensa/tags/20180109-xtensa' into staging

target/xtensa updates:

- add libisa to the xtensa target;
- change xtensa instruction translator to use it;
- switch existing xtensa cores to use it;
- add support for a number of instructions: salt/saltu, const16,
  GPIO32 group, debug mode and MMU-related;
- add disassembler for Xtensa.

# gpg: Signature made Tue 09 Jan 2018 18:11:02 GMT
# gpg:                using RSA key 0x51F9CC91F83FA044
# gpg: Good signature from "Max Filippov <filippov@cadence.com>"
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>"
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>"
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20180109-xtensa:
  target/xtensa: implement disassembler
  target/xtensa: implement const16
  target/xtensa: implement GPIO32
  target/xtensa: implement salt/saltu
  target/xtensa: add internal/noop SRs and opcodes
  target/xtensa: drop DisasContext::litbase
  target/xtensa: tests: fix memctl SR test
  target/xtensa: use libisa for instruction decoding
  target/xtensa: switch fsf to libisa
  target/xtensa: switch dc233c to libisa
  target/xtensa: switch dc232b to libisa
  target/xtensa: update import_core.sh script for libisa
  target/xtensa: extract FPU2000 opcode translators
  target/xtensa: extract core opcode translators
  target/xtensa: import libisa source
  target/xtensa: pass actual frame size to the entry helper

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-09 18:23:27 +00:00
Max Filippov 5a6539e627 target/xtensa: implement disassembler
Add disas/xtensa.c and use libisa for instruction decoding/opcode name
lookup.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-01-09 09:55:39 -08:00
Philippe Mathieu-Daudé 9d80865724 nios2: remove duplicated includes (in code commented out)
applied using ./scripts/clean-includes

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-12-18 17:07:02 +03:00
Emilio G. Cota 5f2d910c00 disas/arm: fix 'instuction' typo in comment
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-12-18 17:07:02 +03:00
Richard Henderson 6cd61517fb target/arm: Move BE32 disassembler fixup
The Capstone disassembler has its own big-endian fixup.
Doing this twice does not work, of course.  Move our current
fixup from target/arm/cpu.c to disas/arm.c.

This makes read_memory_inner_func unused and can be removed.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-25 11:54:52 +02:00
Richard Henderson bbde936a20 disas/i386: Add disassembly of rorx
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-09-06 07:19:00 -07:00
Richard Henderson a17d3be6fb disas/i386: Add disassembly of vex.0f38.f5
Which includes pext, pdep and bzhi.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-09-06 07:18:51 -07:00
Richard Henderson 980edf4b69 disas/i386: Fix disassembly of two-byte vex prefixes
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-09-06 07:18:23 -07:00
Richard Henderson a46c1244a0 tcg: Remove support for ia64 as host
We threatened to remove ia64 as host in v2.9.0.  Its time has now come.

There are still some usages of defined(__ia64__) throughout the source
code that would be triggered if one were to enable TCI on an ia64 host.
Leave those alone for now.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-09-05 12:39:25 -07:00
Stefan Weil 9a32e6f3a1 disas/microblaze: Add missing 'const' attributes
Making the opcode list 'const' saves memory.
Some function arguments and local variables needed 'const', too.

Add also 'static' to two local functions.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
[EI: Removed old prototypes to fix the build]
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2017-07-04 09:22:20 +02:00
Bruno Dominguez 11cde1c810 configure: split c and cxx extra flags
There was no possibility to add specific cxx flags using the configure
file. So A new entrance has been created to support it.

Duplication of information in configure and rules.mak. Taking
QEMU_CFLAGS and add them to QEMU_CXXFLAGS, now the value of
QEMU_CXXFLAGS is stored in config-host.mak, so there is no need for
it.

The makefile for libvixl was adding flags for QEMU_CXXFLAGS in
QEMU_CFLAGS because of the addition in rules.mak. That was removed, so
adding them where it should be.

Signed-off-by: Bruno Dominguez <bru.dominguez@gmail.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1496754467-20893-1-git-send-email-bru.dominguez@gmail.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-06-07 15:29:46 +01:00
Kamil Rytarowski 993063fbb5 libvixl: Correct build failures on NetBSD
Ensure that C99 macros are defined regardless of the inclusion order of
headers in vixl. This is required at least on NetBSD.

The vixl/globals.h headers defines __STDC_CONSTANT_MACROS and must be
included before other system headers.

This file defines unconditionally the following macros, without altering
the original sources:
 - __STDC_CONSTANT_MACROS
 - __STDC_LIMIT_MACROS
 - __STDC_FORMAT_MACROS

Signed-off-by: Kamil Rytarowski <n54@gmx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20170514051820.15985-1-n54@gmx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-02 11:51:46 +01:00
Peter Maydell 230f4c6bc5 disas/cris.c: Avoid unintentional sign extension
Commit 001ebaca7b fixed some unintended sign extension issues
spotted by Coverity (CID 1005402, 1005403), but didn't catch
all of them. Fix the rest, so we behave consistently whether
'long' is 32 bit or 64 bit.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1490970671-20560-1-git-send-email-peter.maydell@linaro.org
2017-04-03 14:06:59 +01:00
Peter Maydell bd517b4337 disas/microblaze: Remove unused REG_PC define
The REG_PC define in disas/microblaze.c clashes with a define in
the Linux SPARC system headers:

/home/pm215/qemu/disas/microblaze.c:162:0: error: "REG_PC" redefined [-Werror]
 #define REG_PC  32 /* PC */

In file included from /usr/include/signal.h:326:0,
                 from /home/pm215/qemu/include/qemu/osdep.h:86,
                 from /home/pm215/qemu/disas/microblaze.c:36:
/usr/include/sparc64-linux-gnu/sys/ucontext.h:96:0: note: this is the location of the previous definition
 #define REG_PC  (1)

Since the code doesn't actually use the REG_PC define
anywhere, the simplest fix is just to remove it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1490272961-1128-1-git-send-email-peter.maydell@linaro.org
2017-03-24 10:12:23 +00:00
Peter Maydell 43c227f9dd disas/arm: Avoid unintended sign extension
When assembling 'given' from the instruction bytes, C's integer
promotion rules mean we may promote an unsigned char to a signed
integer before shifting it, and then sign extend to a 64-bit long,
which can set the high bits of the long.  The code doesn't in fact
care about the high bits if the long is 64 bits, but this is
surprising, so don't do it.

(Spotted by Coverity, CID 1005404.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1488556233-31246-7-git-send-email-peter.maydell@linaro.org
2017-03-07 14:33:51 +00:00
Peter Maydell 001ebaca7b disas/cris: Avoid unintended sign extension
In the cris disassembler we were using 'unsigned long' to calculate
addresses which are supposed to be 32 bits.  This meant that we might
accidentally sign extend or calculate a value that was outside the 32
bit range of the guest CPU.  Use 'uint32_t' instead so we give the
right answers on 64-bit hosts.

(Spotted by Coverity, CID 1005402, 1005403.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1488556233-31246-6-git-send-email-peter.maydell@linaro.org
2017-03-07 14:33:51 +00:00
Peter Maydell 1d153a3388 disas/microblaze: Avoid unintended sign extension
In read_insn_microblaze() we assemble 4 bytes into an 'unsigned
long'.  If 'unsigned long' is 64 bits and the high byte has its top
bit set, then C's implicit conversion from 'unsigned char' to 'int'
for the shift will result in an unintended sign extension which sets
the top 32 bits in 'inst'.  Add casts to prevent this.  (Spotted by
Coverity, CID 1005401.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1488556233-31246-5-git-send-email-peter.maydell@linaro.org
2017-03-07 14:33:51 +00:00
Peter Maydell 2e3883d03d disas/m68k: Avoid unintended sign extension in get_field()
In get_field(), we take an 'unsigned char' value and shift it left,
which implicitly promotes it to 'signed int', before ORing it into an
'unsigned long' type.  If 'unsigned long' is 64 bits then this will
result in a sign extension and the top 32 bits of the result will be
1s.  Add explicit casts to unsigned long before shifting to prevent
this.

(Spotted by Coverity, CID 715697.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-id: 1488556233-31246-4-git-send-email-peter.maydell@linaro.org
2017-03-07 14:33:51 +00:00
Peter Maydell 3f168b5d35 disas/i386: Avoid NULL pointer dereference in error case
In a code path where we hit an internal disassembler error, execution
would subsequently attempt to dereference a NULL pointer.  This
should never happen, but avoid the crash.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1488556233-31246-3-git-send-email-peter.maydell@linaro.org
2017-03-07 14:33:51 +00:00
Peter Maydell 6815a8a00a disas/hppa: Remove dead code
Coverity complains (CID 1302705) that the "fr0" part of the ?: in
fput_fp_reg_r() is dead.  This looks like cut-n-paste error from
fput_fp_reg(); delete the dead code.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1488556233-31246-2-git-send-email-peter.maydell@linaro.org
2017-03-07 14:33:51 +00:00
Stefan Weil bd97a59eec disas/ppc: Fix indefinite articles in comments
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31 10:10:12 +11:00
Peter Maydell ae5045ae5b nios2 target support
-----BEGIN PGP SIGNATURE-----
 
 iQEcBAABAgAGBQJYh8MTAAoJEK0ScMxN0Ceb3Y8IAMIXmsa0O50JwReounqUEDQZ
 6xyvLj8AtYseNbSme7DXD1g+o6YthuR+VY8MrxWkTAuzoMKQs/rUNVSpPjBJYztg
 JsBDmLTaNLY5FZ4ENvFyonJ38wN0wIwYqNZteVHN1IFdF6qpq+hb2rZNOecmWssY
 Y8BLaybjDTPhGJUQWVnfWRG7A1BEeQzNEvzom+SorU7fXRuXaB2YZWJTNCQ3Bm8d
 0xd7YgxNWolZ8s12mYZabiYwJxTLMbd8wsSEPgCZYQisiGWeOMHOas9YV4s4JV+k
 QP9NkhhR9d9oKBTvhiRgMaYDUk+jJ150xYq2coW9Oxri2CveMJpiaE5RKXGW8Rk=
 =HkIp
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth/tags/pull-nios-20170124' into staging

nios2 target support

# gpg: Signature made Tue 24 Jan 2017 21:11:47 GMT
# gpg:                using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg:                 aka "Richard Henderson <rth@redhat.com>"
# gpg:                 aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-nios-20170124:
  nios2: Add support for Nios-II R1
  nios2: Add Altera 10M50 GHRD emulation
  nios2: Add periodic timer emulation
  nios2: Add IIC interrupt controller emulation
  nios2: Add usermode binaries emulation
  nios2: Add disas entries
  nios2: Add architecture emulation support

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-25 13:30:23 +00:00
Marek Vasut 3f0c342309 nios2: Add disas entries
Add nios2 disassembler support. This patch is composed from binutils files
from commit "Opcodes and assembler support for Nios II R2". The files from
binutils used in this patch are:

    include/opcode/nios2.h
    include/opcode/nios2r1.h
    include/opcode/nios2r2.h
    opcodes/nios2-opc.c
    opcodes/nios2-dis.c

Checkpatch says total: 114 errors, 0 warnings, 3609 lines checked , which
is caused by a different coding style in those files. These warnings and
errors are not addressed To let these files be easily synchronized between
binutils and qemu.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Wulff <crwulff@gmail.com>
Cc: Jeff Da Silva <jdasilva@altera.com>
Cc: Ley Foon Tan <lftan@altera.com>
Cc: Sandra Loosemore <sandra@codesourcery.com>
Cc: Yves Vandervennet <yvanderv@altera.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Message-Id: <20170118220146.489-2-marex@denx.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-24 13:10:35 -08:00
Peter Maydell e110788469 disas/cris.c: Fix Coverity warning about unchecked NULL
Coverity (CID 1005689) warns that we don't check that
spec_reg_info() returned non-NULL before dereferencing.
Add the check, though as the comment notes this is
a can't-really-happen case because the earlier constraint
matching should have ruled out the "unknown reg" case.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-01-24 23:26:53 +03:00
Richard Henderson 429b31a205 Revert "Remove remainders of HPPA backend"
This reverts commit d41f3c3cc7.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-22 18:13:56 -08:00
Richard Henderson 8d8dd793da disas/ppc: Handle popcnt and cnttz
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10 08:06:11 -08:00
Richard Henderson f7749a3317 disas/i386.c: Handle tzcnt
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10 08:06:11 -08:00
Peter Maydell 225adf16d2 slirp updates
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEaw+sIYVmRulKotIAoAMZaCdBSIAFAlhZuSkACgkQoAMZaCdB
 SIC7Ww//WrLucx5WC4pp5Eoq4js5sZ4Z35LDj89VtCmVg9M09ti3ryzdphwuUk+s
 S82SojwRodSd1QzBkqk2m5AIGm1KbRF7tl8S31OrBwZqOwo5jSfXoXvrvnFbKxSg
 qXlACZ7rJeCp29CBZxy3Tw792tlZI9+YCkuDmOQzhDLe3iLHBP1PvTpvI2GiYfr6
 OpfMtWqguQULjS4RQfNjplxhRa/W0e8KZAp7BZDOiG8KzqMV+7PBCXDUKsSvsVR6
 VcYCL4f8V/9XCriWqOPica67sl9iwoPHESJM9f1MOPZYA7ykFPPW2qMFbyCaGpQV
 p6nghZSg+Q5dMIjvaolGG4x/JwggFy9LPtqzFuu3r2OpSnIYqGCwzL81QurJcj3G
 Iqzm4SINM8TSk+IRvCHo7qqrZukSFqx6gYBUO/tvxRTKqWIRmCMBgkSV2/yga1fi
 EeCKSoj+9gSUpdWsDqW+yeYTi3FvcHGadlNHvy0rJhAv5LGIvsF87gwwqqimtQgS
 AL8rw8kQ7RhwxFNo9OskICk8EAGKE04EPtdfqTTihmFg3d/Grlg0y07U2yZxVjNw
 0+bv9gdIqLZdCEvmjqM+5zaL+jm6K2G7zoZ7wtT3hyvaY8Ls6hA90tUbywfF3AmP
 kx0VRtqtLoNxwyOz/DclEuweyTyMAA1URM1Rjv+QRaoOeV6I8Oc=
 =nqB8
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/thibault/tags/samuel-thibault' into staging

slirp updates

# gpg: Signature made Tue 20 Dec 2016 23:05:13 GMT
# gpg:                using RSA key 0xA003196827414880
# gpg: Good signature from "Samuel Thibault <samuel.thibault@gnu.org>"
# gpg:                 aka "Samuel Thibault <sthibault@debian.org>"
# gpg:                 aka "Samuel Thibault <samuel.thibault@inria.fr>"
# gpg:                 aka "Samuel Thibault <samuel.thibault@labri.fr>"
# gpg:                 aka "Samuel Thibault <samuel.thibault@ens-lyon.org>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 900C B024 B679 31D4 0F82  304B D017 8C76 7D06 9EE6
#      Subkey fingerprint: 6B0F AC21 8566 46E9 4AA2  D200 A003 1968 2741 4880

* remotes/thibault/tags/samuel-thibault:
  slirp: support dynamic block size for TFTP transfers
  slirp, disas: Replace min/max with MIN/MAX macros

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-22 12:06:59 +00:00
Yuval Shaia 893dcdbfa9 slirp, disas: Replace min/max with MIN/MAX macros
Signed-off-by: Yuval Shaia <yuval.shaia@oracle.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2016-12-20 23:55:19 +01:00
Thomas Huth fcf5ef2ab5 Move target-* CPU file into a target/ folder
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.

Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part]
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part]
Acked-by: Michael Walle <michael@walle.cc> [lm32 part]
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part]
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part]
Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part]
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part]
Acked-by: Richard Henderson <rth@twiddle.net> [alpha part]
Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part]
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part]
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part]
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2016-12-20 21:52:12 +01:00
Bharata B Rao 09a245e187 target-ppc: add vrldnm and vrlwnm instructions
vrldnm: Vector Rotate Left Doubleword then AND with Mask
vrlwnm: Vector Rotate Left Word then AND with Mask

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-11-15 10:05:50 +11:00
Gautham R. Shenoy 3e00884f4e target-ppc: add vrldnmi and vrlwmi instructions
vrldmi: Vector Rotate Left Dword then Mask Insert
vrlwmi: Vector Rotate Left Word then Mask Insert

Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
( use extract[32,64] and rol[32,64], introduce mask helpers in
  internal.h )
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-11-15 10:05:50 +11:00
Peter Maydell d486ccaa9e disas/arm.c: Remove unused macro definitions
The macros ISSPACE, strneq, NUM_ELEMS and NUM_ARM_REGNAMES
are defined in disas/arm.c but never used. Remove the
unnecessary definitions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22 18:13:09 +01:00
Ladi Prosek d4b84d564e Remove unused function declarations
Unused function declarations were found using a simple gcc plugin and
manually verified by grepping the sources.

Signed-off-by: Ladi Prosek <lprosek@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-09-15 15:32:22 +03:00
Thomas Huth d41f3c3cc7 Remove remainders of HPPA backend
The HPPA backend has been removed by the following commit:

    802b508123
    tcg-hppa: Remove tcg backend

But some small pieces of the HPPA backend still survived until
today. Since we also do not have support for a HPPA target in
QEMU, we can nowadays safely remove the remaining HPPA parts
(like the disassembler code, or the detection of HPPA in the
configure script).

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-09-15 15:32:22 +03:00
Peter Maydell 5d3217340a disas: Fix ATTRIBUTE_UNUSED define clash with ALSA headers
disas/bfd.h defines ATTRIBUTE_UNUSED, but unfortunately the
ALSA system headers also define this macro, which means that
you can get a compilation failure if building with ALSA and
any files happen to include the alsa headers before bfd.h
rather than the other way around.

This is unfortunate namespace pollution by the ALSA headers but
we can work around it. Add an #ifndef guard to bfd.h and remove
the unnecessary extra definition in disas/arm.c to fix this.

Reported-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1468937076-21503-1-git-send-email-peter.maydell@linaro.org
2016-07-19 16:40:39 +01:00
Lluís Vilanova ca66f1a174 disas: Remove unused macro '_'
Eliminates a future compilation error when UI code includes the tracing
headers (indirectly pulling "disas/bfd.h" through "qom/cpu.h") and
GLib's i18n '_' macro.

Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-07-18 18:13:54 +01:00
Paolo Bonzini 65603e2fc1 tci: do not include exec/exec-all.h
TCI does not need the runtime definition in exec-all.h.  It only needs the
host-side definitions in tcg/tcg.h.  Now that cpu.h is not included
everywhere, this caused a failure because exec-all.h does need cpu.h
but does not include it itself.

Fix by including the intended header.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1463745452-25831-1-git-send-email-pbonzini@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-20 15:07:46 +01:00
Paolo Bonzini 63c915526d cpu: move exec-all.h inclusion out of cpu.h
exec-all.h contains TCG-specific definitions.  It is not needed outside
TCG-specific files such as translate.c, exec.c or *helper.c.

One generic function had snuck into include/exec/exec-all.h; move it to
include/qom/cpu.h.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-05-19 16:42:29 +02:00
Peter Maydell 84a5a80148 * Log filtering from Alex and Peter
* Chardev fix from Marc-André
 * config.status tweak from David
 * Header file tweaks from Markus, myself and Veronia (Outreachy candidate)
 * get_ticks_per_sec() removal from Rutuja (Outreachy candidate)
 * Coverity fix from myself
 * PKE implementation from myself, based on rth's XSAVE support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQEcBAABCAAGBQJW9ErPAAoJEL/70l94x66DJfEH/A/QkMpAhrgNdyVsahzsGrzE
 wx5gHFIc1nBYxyr62w4apUb5jPB7zaXu0LA7EAWDeAe0pyP8hZzLT9kJyOEDsuJu
 zwKN2QeLSNMtPbnbKN0I/YQ2za2xX1V5ruhSeOJoVslUI214hgnAURaGshhQNzuZ
 2CluDT9KgL5cQifAnKs5kJrwhIYShYNQB+1eDC/7wk28dd/EH+sPALIoF+rqrSmt
 Zu4Mdqd+9Ns+oKOjA6br9ULq/Hzg0aDfY82J+XLVVqfF3PXQe8rTDmuMf/7jTn+M
 Un7ZOcei9oZF2/9vfAfKQpDCcgD9HvOUSbgqV/ubmkPPmN/LNJzeKj0fBhrRN+Y=
 =K12D
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Log filtering from Alex and Peter
* Chardev fix from Marc-André
* config.status tweak from David
* Header file tweaks from Markus, myself and Veronia (Outreachy candidate)
* get_ticks_per_sec() removal from Rutuja (Outreachy candidate)
* Coverity fix from myself
* PKE implementation from myself, based on rth's XSAVE support

# gpg: Signature made Thu 24 Mar 2016 20:15:11 GMT using RSA key ID 78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"

* remotes/bonzini/tags/for-upstream: (28 commits)
  target-i386: implement PKE for TCG
  config.status: Pass extra parameters
  char: translate from QIOChannel error to errno
  exec: fix error handling in file_ram_alloc
  cputlb: modernise the debug support
  qemu-log: support simple pid substitution for logs
  target-arm: dfilter support for in_asm
  qemu-log: dfilter-ise exec, out_asm, op and opt_op
  qemu-log: new option -dfilter to limit output
  qemu-log: Improve the "exec" TB execution logging
  qemu-log: Avoid function call for disabled qemu_log_mask logging
  qemu-log: correct help text for -d cpu
  tcg: pass down TranslationBlock to tcg_code_gen
  util: move declarations out of qemu-common.h
  Replaced get_tick_per_sec() by NANOSECONDS_PER_SECOND
  hw: explicitly include qemu-common.h and cpu.h
  include/crypto: Include qapi-types.h or qemu/bswap.h instead of qemu-common.h
  isa: Move DMA_transfer_handler from qemu-common.h to hw/isa/isa.h
  Move ParallelIOArg from qemu-common.h to sysemu/char.h
  Move QEMU_ALIGN_*() from qemu-common.h to qemu/osdep.h
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Conflicts:
	scripts/clean-includes
2016-03-24 21:42:40 +00:00
Veronia Bahaa f348b6d1a5 util: move declarations out of qemu-common.h
Move declarations out of qemu-common.h for functions declared in
utils/ files: e.g. include/qemu/path.h for utils/path.c.
Move inline functions out of qemu-common.h and into new files (e.g.
include/qemu/bcd.h)

Signed-off-by: Veronia Bahaa <veroniabahaa@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-22 22:20:17 +01:00
Stefan Weil 8ff98f1ed2 Remove unneeded include statements for setjmp.h
As soon as setjmp.h is included from qemu/osdep.h, those old include
statements are no longer needed.

Add also setjmp.h to the list in scripts/clean-includes.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
2016-03-22 19:11:15 +01:00
Yongbok Kim 01bc435b44 target-mips: implement R6 multi-threading
MIPS Release 6 provides multi-threading features which replace
pre-R6 MT Module. CP0.Config3.MT is always 0 in R6, instead there is new
CP0.Config5.VP (Virtual Processor) bit which indicates presence of
multi-threading support which includes CP0.GlobalNumber register and
DVP/EVP instructions.

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-02-26 08:59:17 +00:00
Peter Maydell e78490c44c disas/arm-a64.cc: Include osdep.h first
Rearrange include directives so that we include osdep.h first.
This has to be done manually because clean-includes doesn't
handle C++.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-02-23 12:43:04 +00:00
Peter Maydell 48d4ab25e7 disas: Clean up includes
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.

This commit was created with scripts/clean-includes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1454089805-5470-7-git-send-email-peter.maydell@linaro.org
2016-02-04 17:41:30 +00:00
Peter Maydell 0602f420e4 libvixl: Avoid std::abs() of 64-bit type
The std::abs() function did not get a version that works on
'long long' until C++11. Avoid it, so that we can compile on
32-bit platforms (where int64_t is 'long long') with older
compilers (which don't support C++11).

Reported-by: Franz-Josef Haider <Franz-Josef.Haider@student.uibk.ac.at>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1453739429-31477-1-git-send-email-peter.maydell@linaro.org
2016-02-03 13:46:34 +00:00