aurel32
f23c346e69
target-ppc: use the new fp functions
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6051 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-15 17:14:27 +00:00
aurel32
3b27fc36e3
target-ppc: correctly propagate NaN in division
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6048 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-15 17:14:05 +00:00
aurel32
e0147e4138
target-ppc: fix fload_invalid_op_excp()
...
The argument is a value, not a flag. Update the tests accordingly. Also
set a correct default value for NaN.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6047 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-15 17:13:55 +00:00
aurel32
05b936038f
target-ppc: use a correct value to represent 1.0
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6046 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-15 17:13:48 +00:00
aurel32
6ad193ed43
target-ppc: fix frsp instruction
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6036 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-15 01:00:17 +00:00
aurel32
27ee5df007
target-ppc: fix mtfsf and mtfsfi instructions
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6035 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-15 00:30:28 +00:00
aurel32
9a819377d8
target-ppc: fix fcmp{o,u} instructions
...
The instructions are specified to update the condition register even if
an error is to be signaled because of NaN input.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6034 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-14 19:34:09 +00:00
aurel32
6e35d5243c
target-ppc: fix mtfsb0 and mtfsb1
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6032 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-14 18:40:58 +00:00
aurel32
6ad7365a81
target-ppc: fix fsel instruction
...
Fix fsel instruction. Eliminate unneeded temporaries while we're at it,
too.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6026 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-14 11:12:10 +00:00
aurel32
5e9ae189f8
target-ppc: keep only the table version for mfrom
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6007 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 12:30:21 +00:00
aurel32
be94c952e4
target-ppc: use accessors to access fp_status exception_flags
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6006 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 12:13:33 +00:00
aurel32
cf1cf21eac
target-ppc: fix compilation with PRECISE_EMULATION
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6004 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 11:46:36 +00:00
aurel32
a44d2ce18a
target-ppc: fix compilation with CONFIG_SOFTFLOAT
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6003 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 11:46:27 +00:00
aurel32
9322057384
target-ppc: remove remaining warnings
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5991 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-11 22:42:33 +00:00
aurel32
e06fcd754e
target-ppc: rework exception code
...
... also remove two warnings.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5989 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-11 22:42:14 +00:00
aurel32
db9a16a70c
target-ppc: kill a warning
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5952 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08 18:11:50 +00:00
aurel32
0e69805af6
target-ppc: cleanup op_helper.c after TCG conversion
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5951 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08 18:11:42 +00:00
aurel32
76db3ba44e
target-ppc: memory load/store rework
...
Rework the memory load/store:
- Unify load/store functions for 32-bit and 64-bit CPU
- Don't swap values twice for bit-reverse load/store functions
in little endian mode.
- On a 64-bit CPU in 32-bit mode, do the address truncation for
address computation instead of every load store. Truncate the
address when incrementing the address (if needed)
- Cache writes to access_types.
- Add a few missing calls to gen_set_access_type()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5949 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08 18:11:21 +00:00
aurel32
45d827d2d7
target-ppc: convert SPR accesses to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5910 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 13:40:29 +00:00
aurel32
fa0d32c4e4
target-ppc: remove dead code
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5909 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 13:40:15 +00:00
aurel32
74d37793f4
target-ppc: convert SLB/TLB instructions to TCG
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5895 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-06 21:46:17 +00:00
aurel32
06dca6a7c1
target-ppc: convert dcr load/store to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5893 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-06 16:37:18 +00:00
aurel32
6527f6ea9c
target-ppc: convert msr load/store to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5892 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-06 13:03:35 +00:00
aurel32
22e0e17337
target-ppc: convert POWER bridge instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5891 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-06 12:19:14 +00:00
aurel32
dcc532c809
target-ppc: use ldl/ldub/stl/stub for load/store in op_helper.c
...
Should not give any performance penality given cpu_mmu_index() is
an inline function returning a value from env.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5837 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 17:54:21 +00:00
aurel32
ef0d51af1e
target-ppc: convert PPC 440 instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5836 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 17:26:29 +00:00
aurel32
d72a19f7bd
target-ppc: convert return from interrupt instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5832 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:24:55 +00:00
aurel32
bdb4b68907
target-ppc: convert lscbx instruction to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5829 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:24:30 +00:00
aurel32
dfbc799d8e
target-ppc: convert load/store string instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5828 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:24:21 +00:00
aurel32
37d269dfc6
target-ppc: convert icbi instruction to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5827 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:24:13 +00:00
aurel32
799a8c8d0a
target-ppc: convert dcbz instruction to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5826 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:24:05 +00:00
aurel32
ff4a62cd81
target-ppc: convert load/store multiple instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5825 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:23:56 +00:00
aurel32
cf02a65c77
target-ppc: convert mfrom instruction to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5823 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:23:35 +00:00
aurel32
0f3955e2d2
target-ppc: convert software TLB instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5819 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:22:56 +00:00
aurel32
cab3bee2d6
target-ppc: convert trap instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5788 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-24 11:28:19 +00:00
aurel32
a0d7d5a776
target-ppc: convert FPU load/store to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5786 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-23 16:30:50 +00:00
aurel32
1c97856dcc
target-ppc: convert SPE FP ops to TCG
...
Including a few bug fixes:
- Don't clear high part for instruction with 32-bit destination
- Fix efscmp* and etstcmp* return value
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5783 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-23 10:54:04 +00:00
aurel32
64adab3fcb
target-ppc: convert exceptions generation to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5772 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-22 10:09:17 +00:00
aurel32
af12906f77
target-ppc: convert fp ops to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5754 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-19 16:10:23 +00:00
pbrook
a7812ae412
TCG variable type checking.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
aurel32
57951c2742
target-ppc: convert most SPE integer instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5668 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10 11:10:23 +00:00
aurel32
6176a26d1d
target-ppc: optimize popcntb
...
Suggested by Andrzej Zaborowski.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5592 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-01 00:54:33 +00:00
aurel32
182608d44c
target-ppc: convert 405 MAC instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5591 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-01 00:54:23 +00:00
aurel32
7463740644
target-ppc: convert arithmetic functions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5590 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-01 00:54:12 +00:00
aurel32
26d6736245
target-ppc: convert logical instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5506 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-21 11:31:27 +00:00
aurel32
e1571908a2
target-ppc: convert crf related instructions to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5505 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-21 11:31:14 +00:00
aurel32
3d7b417e13
target-ppc: Convert XER accesses to TCG
...
Define XER bits as a single register and access them individually to
avoid defining 5 32-bit registers (TCG doesn't permit to map 8-bit
registers).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5500 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-21 11:28:46 +00:00
aurel32
e2be8d8d7e
PPC: convert effective address computation to TCG
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5490 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-14 19:55:54 +00:00
aurel32
0cadcbbe65
target-ppc: fix computation of XER.{CA, OV} in addme, subfme
...
(Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5380 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-01 21:45:37 +00:00
aurel32
5bf06a9528
target-ppc: fix mullw/mullwo
...
Based on patch by Julian Seward.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5379 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-01 21:45:18 +00:00