This is specific to OpenHackware, and not used by OpenBIOS.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6347 c046a42c-6fe2-441c-8c8c-71466251a162
Patch 5/7
This patch changes the graphical_console_init function to return an
allocated DisplayState instead of a QEMUConsole.
This patch contains just the graphical_console_init change and few other
modifications mainly in console.c and vl.c.
It was necessary to move the display frontends (e.g. sdl and vnc)
initialization after machine->init in vl.c.
This patch does *not* include any required changes to any device, these
changes come with the following patches.
Patch 6/7
This patch changes the QEMUMachine init functions not to take a
DisplayState as an argument because is not needed any more;
In few places the graphic hardware initialization function was called
only if DisplayState was not NULL, now they are always called.
Apart from these cases, the rest are all mechanical substitutions.
Patch 7/7
This patch updates the graphic device code to use the new
graphical_console_init function.
As for the previous patch, in few places graphical_console_init was called
only if DisplayState was not NULL, now it is always called.
Apart from these cases, the rest are all mechanical substitutions.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6344 c046a42c-6fe2-441c-8c8c-71466251a162
The Z85C30 on the PowerMAC machines have one interrupt per serial
channel, while the Sparc machines have only one for both. Allow the
emulated device to use one IRQ per channel.
Patch by Laurent Vivier.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6295 c046a42c-6fe2-441c-8c8c-71466251a162
Add a table of PCI NIC models to pass to qemu_setup_nic_model().
While we're at it, also add a corresponding table of NIC init
functions.
Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6287 c046a42c-6fe2-441c-8c8c-71466251a162
The G3 B&W is a new world machine. The machine currently implemented is
actually closer to a G3 beige.
Also swith the MacIO from Paddigton (new world) to Heathrow (old world).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6228 c046a42c-6fe2-441c-8c8c-71466251a162
Introduce a max_cpus per-machine variable, allowing individual boards
to limit it's number of CPUs. Check requested number of CPUs in setup
code and exit if it exceeds the supported number for the machine.
This also renders the static MAX_CPUS check obsolete, so remove this
from vl.c.
Signed-off-by: Jes Sorensen <jes@sgi.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5443 c046a42c-6fe2-441c-8c8c-71466251a162
Modify all the machine struct declarations to use C99 initializers.
This patch has no functional changes.
Signed-off-by: Jes Sorensen <jes@sgi.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5442 c046a42c-6fe2-441c-8c8c-71466251a162
Fix gcc warning in PowerPC PreP machine init routine.
Add second IDE channel to Heathrow Mac machine (still not handled by OHW).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3586 c046a42c-6fe2-441c-8c8c-71466251a162
and avoiding per-target hardcoded limitations.
The machine implementations can then check if the given devices match the
actual hardware implementation and firmware API.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3577 c046a42c-6fe2-441c-8c8c-71466251a162
This option is not allowed for PowerMac, as it would overlap with NVRAM.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3480 c046a42c-6fe2-441c-8c8c-71466251a162
* make PowerPC NVRAM accessors generic to be able to use a MacIO NVRAM
instead of the M48T59 one
* split PowerMac targets code:
- move all PowerMac related definitions and prototypes into hw/ppc_mac.h
- add hw/mac_dbdma.c, hw/mac_nvram.c and macio.c
which implements shared PowerMac devices
- define the g3bw machine in a new hw/ppc_oldworld.c file
* Fix the g3bw target:
- fix the Grackle host PCI device
- connect the Heathrow PIC to the PowerPC 6xx bus pins
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3475 c046a42c-6fe2-441c-8c8c-71466251a162
