Commit Graph

92802 Commits

Author SHA1 Message Date
Richard Henderson ffe81d4398 linux-user/arm: Move target_oabi_flock64 out of target_structs.h
Place it next to copy_from/to_user_oabi_flock64, the only users,
inside the existing target-specific ifdef.  This leaves only
generic ipc structs in target_structs.h.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220107042600.149852-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 2dd4634963 linux-user/xtensa: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal. Fill in the missing PC for SIGTRAP.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-25-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson ac80d8b151 linux-user/sparc: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal. Fill in the missing PC for SIGTRAP.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-24-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 588c7a171b linux-user/sh4: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal. Fill in the missing PC for SIGTRAP.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-23-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 8f0bebebd2 linux-user/s390x: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-22-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 8521cc21ad linux-user/riscv: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal.  Fix missing PC from EXCP_DEBUG by
merging the case with EXCP_BREAKPOINT.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-21-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson d30e60e7b4 linux-user/ppc: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal.  Fill in the missing PC for SIGTRAP.
The fault address for POWERPC_EXCP_ISI is nip exactly, not nip - 4.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-20-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson b600705669 linux-user/openrisc: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal. Fill in the missing PC for SIGTRAP.

Reviewed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-19-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 0a3336f6fd target/mips: Extract trap code into env->error_code
Simplify cpu_loop by doing all of the decode in translate.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-18-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 6f3533dd1b target/mips: Extract break code into env->error_code
Simplify cpu_loop by doing all of the decode in translate.

This fixes a bug in that cpu_loop was not handling the
different layout of the R6 version of break16.  This fixes
a bug in that cpu_loop extracted the wrong bits for the
mips16e break16 instruction.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-17-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 73c0aa6a85 linux-user/mips: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal. Fill in the missing PC for SIGTRAP
and SIGFPE; use force_sig (SI_KERNEL) for EXCP_DSPDIS.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-16-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson bf19bdb8f3 linux-user/mips: Improve do_break
Rename to do_tr_or_bp, as per the kernel function.
Add a 'trap' argument, akin to the kernel's si_code, but clearer.
The return value is always 0, so change the return value to void.
Use force_sig and force_sig_fault.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-15-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 0b25c4a1f6 linux-user/microblaze: Fix SIGFPE si_codes
Fix a typo for ESR_EC_DIVZERO, which is integral not floating-point.
Fix the if ladder for decoding floating-point exceptions.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-14-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 23ae825ab7 linux-user/microblaze: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal. Fill in the missing PC for SIGTRAP.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-13-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 71dc6f7488 linux-user/m68k: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal. Fill in the missing PC for SIGTRAP.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-12-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson d08d6d66f6 linux-user/i386: Use force_sig, force_sig_fault
Replace the local gen_signal with the generic functions that match
how the kernel raises signals. Fill in the missing PC for SIGTRAP.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-11-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 1ade5b2fed linux-user/i386: Split out maybe_handle_vm86_trap
Reduce the number of ifdefs within cpu_loop().

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-10-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:44 +01:00
Richard Henderson 0edf34c93e linux-user/hppa: Set FPE_CONDTRAP for COND
This si_code was changed in 75abf64287cab, for linux 4.17.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-9-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:43 +01:00
Richard Henderson 6ac3bf1f55 linux-user: Remove TARGET_NSIGFPE
This define is unused, and we have no similar define for
the other signal sub-codes.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-8-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:43 +01:00
Richard Henderson 7337adeac0 linux-user/hppa: Use the proper si_code for PRIV_OPR, PRIV_REG, OVERFLOW
These si_codes have been properly set by the kernel since the beginning.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-7-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:43 +01:00
Richard Henderson f64859684a linux-user/hppa: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal.  Fill in the missing PC for SIGTRAP
and missing si_code for SIGBUS.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-6-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:43 +01:00
Richard Henderson 32e321861d linux-user/cris: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal.  Fill in the missing PC for SIGTRAP.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-5-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:43 +01:00
Richard Henderson 1c165977de linux-user/alpha: Use force_sig_fault
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-4-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:43 +01:00
Richard Henderson d9c5d7cf4d linux-user/alpha: Set FPE_FLTUNK for gentrap ROPRAND
This si_code was changed in 4cc13e4f6d441, for linux 4.17.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-3-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:43 +01:00
Richard Henderson d010b8bd93 linux-user/alpha: Set TRAP_UNK for bugchk and unknown gentrap
These si_codes were changed in 535906c684fca, for linux 4.17.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-11 18:40:43 +01:00
Peter Maydell 64c01c7da4 SD/MMC patches queue
- Add SDHC support for SD card SPI-mode (Frank Chang)
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmHaCHIACgkQ4+MsLN6t
 wN4sdhAAtGumw7ji0DOsVA7xP0jXi471NUaE5Y21OSsWWozbEqGpsF2cAkxSbY17
 CY0cMpQUl/NqbMz0h+GwE1E3EXAChTnQSsEkTmHrWrZOZceIK20ODgiIKFpj6tls
 jIN0mG4YXdo7/ODLO8F7G18zkvcwTTb0+sRA4EUQfAzNcyjWIKBR/0U0xY+cVfy6
 Y+UTk6+Vf01seS4BRVqE2mec4YMjRb/fKwnXdBgMVNf3OlRqfO0wBu6l/03rf0Mo
 GYwxSiDnmVZufLtSTRNL9wW4eQoDBhWrnzh7wTH6kSjNE/ylWLeZPg8uKkNC715h
 H4/k1srMHRpo8PcKOaGJ1VLR3iqAVY80MdBtFKtaFaDJQFkLT2aBUI1xREA9s4uo
 r6xUyfeMCb/d3l0n+gFX9+hv3LlzsfubvLT2FeIFp0K2YioG7upH0PV8eiG7okKf
 AiEvidr8gU1RFk/JUWQDUsqbInpo92INk88jDsrpsgXS74RoYe5T4tR6pIjDXe8s
 dKF3RdQzC0TcgW1uqobduMtrumwEhiY4WKeQvhaKQF1v1JcTQRLqrds3qHhPCayN
 NiyFfue43mtZllUZw0NnezbNsiY+Fgepg4DSqvPHzszdsMHmmY7bs0mx79JoJglN
 mH1xurwjo3Mvv9oeBwP1OcRM7IS4Oz/ALhi0ZNbP+MYwDGwujXU=
 =PEEr
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/philmd/tags/sdmmc-20220108' into staging

SD/MMC patches queue

- Add SDHC support for SD card SPI-mode (Frank Chang)

# gpg: Signature made Sat 08 Jan 2022 21:56:02 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/sdmmc-20220108:
  hw/sd: Add SDHC support for SD card SPI-mode
  hw/sd/sdcard: Rename Write Protect Group variables

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-01-11 11:39:31 +00:00
Peter Maydell bf99e0ec9a virtio: revert config interrupt changes
Lots of fallout from config interrupt changes. Author wants to rework
 the patches. Let's revert quickly so others don't suffer meanwhile.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
 -----BEGIN PGP SIGNATURE-----
 
 iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmHcnzAPHG1zdEByZWRo
 YXQuY29tAAoJECgfDbjSjVRpPQEH/2Kwx1xc8P3U4UULco1VlQ//mC0l0QBJTVpt
 qrt0HFEmXvO8G//ybWeqiwGO88aZ4oaskQN4JxnqJ+QmRp8VA7XDM1QyH6lNdIzt
 tT0xay5QXn/fOZIPwzRYJMqnvrei2mkeIIT60E9BBqVL/c+r3bHGkzmE1sFBSE14
 k/el3le/FJ7eaxU8WnddoIxjKmc9R6xpno96TRiAphdsI7OizHvaMYJ4swE+yQ21
 UHoZkkrJxE3RV7t99CQXHAA2FZIjVtPOegro0t+7a1/EqxRtKkuUJIJSpFWThbWf
 I95BGx8m8g+sDqUYSf6wLR57PQLcOUC1aQqP5N1bptAmyKgR+1I=
 =yQ3c
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

virtio: revert config interrupt changes

Lots of fallout from config interrupt changes. Author wants to rework
the patches. Let's revert quickly so others don't suffer meanwhile.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Mon 10 Jan 2022 21:03:44 GMT
# gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg:                issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  Revert "virtio: introduce macro IRTIO_CONFIG_IRQ_IDX"
  Revert "virtio-pci: decouple notifier from interrupt process"
  Revert "virtio-pci: decouple the single vector from the interrupt process"
  Revert "vhost: introduce new VhostOps vhost_set_config_call"
  Revert "vhost-vdpa: add support for config interrupt"
  Revert "virtio: add support for configure interrupt"
  Revert "vhost: add support for configure interrupt"
  Revert "virtio-net: add support for configure interrupt"
  Revert "virtio-mmio: add support for configure interrupt"
  Revert "virtio-pci: add support for configure interrupt"

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-01-11 10:12:29 +00:00
Michael S. Tsirkin a882b57123 Revert "virtio: introduce macro IRTIO_CONFIG_IRQ_IDX"
This reverts commit bf1d85c166.

Fixes: bf1d85c166 ("virtio: introduce macro IRTIO_CONFIG_IRQ_IDX")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:02:54 -05:00
Michael S. Tsirkin a20fa00ce1 Revert "virtio-pci: decouple notifier from interrupt process"
This reverts commit e3480ef81f.

Fixes: e3480ef81f ("virtio-pci: decouple notifier from interrupt process")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:02:36 -05:00
Michael S. Tsirkin 38ce405198 Revert "virtio-pci: decouple the single vector from the interrupt process"
This reverts commit 316011b8a7.

Fixes: 316011b8a7 ("virtio-pci: decouple the single vector from the interrupt process")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:02:16 -05:00
Michael S. Tsirkin 98b34e030e Revert "vhost: introduce new VhostOps vhost_set_config_call"
This reverts commit 8806237234.

Fixes: 8806237234 ("vhost: introduce new VhostOps vhost_set_config_call")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:02:01 -05:00
Michael S. Tsirkin 73bd56abe1 Revert "vhost-vdpa: add support for config interrupt"
This reverts commit 634f7c89fb.

Fixes: 634f7c89fb ("vhost-vdpa: add support for config interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:01:44 -05:00
Michael S. Tsirkin 81c3ebc32f Revert "virtio: add support for configure interrupt"
This reverts commit 081f864f56.

Fixes: 081f864f56 ("virtio: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:01:28 -05:00
Michael S. Tsirkin a86d1a0a93 Revert "vhost: add support for configure interrupt"
This reverts commit f7220a7ce2.

Fixes: f7220a7ce2 ("vhost: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:01:11 -05:00
Michael S. Tsirkin b3ef6664b7 Revert "virtio-net: add support for configure interrupt"
This reverts commit 497679d510.

Fixes: 497679d510 ("virtio-net: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:00:54 -05:00
Michael S. Tsirkin 99478e5941 Revert "virtio-mmio: add support for configure interrupt"
This reverts commit d48185f1a4.

Fixes: d48185f1a4 ("virtio-mmio: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:00:38 -05:00
Michael S. Tsirkin 847e9bc974 Revert "virtio-pci: add support for configure interrupt"
This reverts commit d5d24d859c.

Fixes: d5d24d859c ("virtio-pci: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:00:02 -05:00
Peter Maydell de3f5223fa M68k pull request 20220109
Add virt compat machine type for 7.0
 fix q800 -bios parameter
 fix VRAM refresh
 fix M68K_FEATURE_UNALIGNED_DATA feature
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmHayd8SHGxhdXJlbnRA
 dml2aWVyLmV1AAoJEPMMOL0/L748rHQP/R8XM6EYG02+6AWuxrQzMtorSyCRkeWP
 2BcvXOM9FEweMA7ZGJ0e1Y5/IDpEAs0L8fJBKUpbFvf8eYg7BwNS+8OGPWbYFwxg
 JuNUfTwr+66h2Q1sHTENSf87WdaczDqUS16xUPPtKFKsoctnS1Jx9r1MK0PEaYUl
 63b6cYma9dzKL1vSdNDCHBvv5CmFDSqX4uKJFdmPmQTRSVOCFIMf3TnAIX2jJTQ+
 +YLiKZG2ulma+xAjjy0qSiN+eeT7wcdc66iRadPcH2NMaQhpA+EJAlOr4qQpDi47
 YK8R1AKIoAuHyoykgnjuAJB+19qAQZtYzRXh4R6WivAtUAUhZKNlghIFuUHo8f5z
 uHbDifRpthbzipDCoCQYaIcKj6Sv0L8gSvWNND4gluY6wR7awudF++3zRl3kXhQ8
 yzhdOaO032xcMvtbLpxWHafp6ZawAdylmnA2hJS2F/Pn0ceBxmDd8TETLIVdr38D
 2CnHc43zZQI4KWNfHTgnNjJ4K1o2YUWQk2wSxYRgU3fQtCgjuMlwq04wsxw+n3Dd
 TYLgUcjpZ2MRf1BmwWXbwI8q8BYeB0LCWCoevobYgjnq5QNY7NHEWGIRWoP6LSqU
 0eA1tF37a48rHQmTFzJIpPIxidIXZZMV8gFEr4yVnMKCTePEa79pTmzTcdN6haJ4
 h6XHvttK3hDW
 =cIYi
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-7.0-pull-request' into staging

M68k pull request 20220109

Add virt compat machine type for 7.0
fix q800 -bios parameter
fix VRAM refresh
fix M68K_FEATURE_UNALIGNED_DATA feature

# gpg: Signature made Sun 09 Jan 2022 11:41:19 GMT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-7.0-pull-request:
  target/m68k: don't word align SP in stack frame if M68K_FEATURE_UNALIGNED_DATA feature enabled
  macfb: fix VRAM dirty memory region logging
  q800: fix segfault with invalid MacROM
  hw: m68k: Add virt compat machine type for 7.0

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-01-10 14:43:03 +00:00
Mark Cave-Ayland 31144eb639 target/m68k: don't word align SP in stack frame if M68K_FEATURE_UNALIGNED_DATA feature enabled
Commit a9431a03f7 ("target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature") added
a new feature for processors from the 68020 onwards which do not require data
accesses to be word aligned.

Unfortunately the original commit missed an additional case whereby the SP is
still word aligned when setting up an additional format 1 stack frame so add the
necessary M68K_FEATURE_UNALIGNED_DATA feature guard.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Fixes: a9431a03f7 ("target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature")
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220108180453.18680-1-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-09 12:05:02 +01:00
Mark Cave-Ayland 4e136629f0 macfb: fix VRAM dirty memory region logging
The macfb VRAM memory region was configured with coalescing rather than dirty
memory logging enabled, causing some areas of the screen not to redraw after
a full screen update.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Fixes: 8ac919a065 ("hw/m68k: add Nubus macfb video card")
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220108164147.30813-1-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-09 12:04:30 +01:00
Laurent Vivier 0969e00b39 q800: fix segfault with invalid MacROM
"qemu-system-m68k -M q800 -bios /dev/null" crashes with a segfault
in q800_init().
This happens because the code doesn't check that rom_ptr() returned
a non-NULL pointer .

To avoid NULL pointer, don't allow 0 sized file and use bios_size with
rom_ptr().

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/756
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220107105049.961489-1-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-09 12:03:21 +01:00
Laurent Vivier 214bdf8e71 hw: m68k: Add virt compat machine type for 7.0
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20211218114340.1856757-1-laurent@vivier.eu>
2022-01-09 12:02:53 +01:00
Richard Henderson df722e33d5 bsd-user: arm (32-bit) support
This series of patches brings in 32-bit arm support for bsd-user.  It implements
 all the bits needed to do image activation, signal handling, stack management
 and threading. This allows us to get to the "Hello World" level. The arm and x86
 code are now the same as in the bsd-user fork. For full context, the fork is at
 https://github.com/qemu-bsd-user/qemu-bsd-user/tree/blitz (though the the recent
 sig{bus,segv} needed updates are incomplete).
 
 v5 changes:
    o Moved to using the CPUArchState typedef and move
      set_sigtramp_args, get_mcontext, set_mcontext, and
      get_ucontext_sigreturn prototypes to
      bsd-user/freebsd/target_os_ucontext.h
    o Fix issues with arm's set_mcontext related to masking
      and remove an unnecessary check.
 
 We're down to only one hunk needing review:
     bsd-user/arm/target_arch_signal.c: arm set_mcontext
 
 Warnings that should be ignored:
    o make checkpatch has a couple of complaints about the comments for the
      signal trampoline, since it's a false positive IMHO.
 WARNING: Block comments use a leading /* on a separate line
 +    /* 8 */ sys_sigreturn,
 WARNING: Block comments use a leading /* on a separate line
 +    /* 9 */ sys_exit
 -----BEGIN PGP SIGNATURE-----
 Comment: GPGTools - https://gpgtools.org
 
 iQIzBAABCgAdFiEEIDX4lLAKo898zeG3bBzRKH2wEQAFAmHZPwUACgkQbBzRKH2w
 EQDXyQ//cT3b2zUQobby/vJX017mFni8ozZgwWSFlAvVFGjWt8UMdAt4rUFzr7a3
 G+IEaw39nqtNyEIaYSvKWFHdMSRP6v7vHnDT3Lz5SHEyShpdzjxKZNZ7NUOH21d2
 T6gCXSOB9AsMPFmi9Pb9ICF61Kf4EhHwYYvw/4/7YKHPeWltfWZQo4sJPOTTVqg5
 drwHu3JQEV53y/gmbVlnklfnNRnbFC0k0UCtfgD2n/IZj6yL1P3Di9zOVeaEQAyK
 L7xF90yrUsFUWtGKpMc5D4idQAWSlwgoD/rYLZ/xPRQtJGNUbQhJ07C788M5/plB
 z3TeWn+M6oBQMWIHwRMhF6vlhO7TNrmjQYW3mubLOigNuP7/2WOpSc2CDLhh72ty
 CF13ifdPFaJzzzkagNHkn1s5BHYeR8TeKGdcYFvgdCgbSu8L0c1bY1ZDaDryOnPr
 JvM7cFNnbukMjmBMNLGnc8HnDIdlRZufxHzEQBGUOEE4ujPooGhWBnhfYbNMCWxT
 wlvmv47FMRSdAl9Qteqz2ZsbQdHDp9PVbvWO1yx9htoeXaM8Nr7il1MQ4FrUkxbz
 P12yUWbCHPAS2+3fADiub/EZLOfYucYcAKPIQ2I7UokFzjR43l2+Nu01HSwcBG9C
 Y4+H0yiwk22UWfKB8cLhFM7wUwh6oeK2cm1eO13IUFwlQGWP9Ik=
 =zscp
 -----END PGP SIGNATURE-----

Merge tag 'bsd-user-arm-pull-request' of gitlab.com:bsdimp/qemu into staging

bsd-user: arm (32-bit) support

This series of patches brings in 32-bit arm support for bsd-user.  It implements
all the bits needed to do image activation, signal handling, stack management
and threading. This allows us to get to the "Hello World" level. The arm and x86
code are now the same as in the bsd-user fork. For full context, the fork is at
https://github.com/qemu-bsd-user/qemu-bsd-user/tree/blitz (though the the recent
sig{bus,segv} needed updates are incomplete).

v5 changes:
   o Moved to using the CPUArchState typedef and move
     set_sigtramp_args, get_mcontext, set_mcontext, and
     get_ucontext_sigreturn prototypes to
     bsd-user/freebsd/target_os_ucontext.h
   o Fix issues with arm's set_mcontext related to masking
     and remove an unnecessary check.

We're down to only one hunk needing review:
    bsd-user/arm/target_arch_signal.c: arm set_mcontext

Warnings that should be ignored:
   o make checkpatch has a couple of complaints about the comments for the
     signal trampoline, since it's a false positive IMHO.
WARNING: Block comments use a leading /* on a separate line
+    /* 8 */ sys_sigreturn,
WARNING: Block comments use a leading /* on a separate line
+    /* 9 */ sys_exit

# gpg: Signature made Fri 07 Jan 2022 11:36:37 PM PST
# gpg:                using RSA key 2035F894B00AA3CF7CCDE1B76C1CD1287DB01100
# gpg: Good signature from "Warner Losh <wlosh@netflix.com>" [unknown]
# gpg:                 aka "Warner Losh <imp@bsdimp.com>" [unknown]
# gpg:                 aka "Warner Losh <imp@freebsd.org>" [unknown]
# gpg:                 aka "Warner Losh <imp@village.org>" [unknown]
# gpg:                 aka "Warner Losh <wlosh@bsdimp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 2035 F894 B00A A3CF 7CCD  E1B7 6C1C D128 7DB0 1100

* tag 'bsd-user-arm-pull-request' of gitlab.com:bsdimp/qemu: (37 commits)
  bsd-user: add arm target build
  bsd-user/freebsd/target_os_ucontext.h: Require TARGET_*CONTEXT_SIZE
  bsd-user/arm/signal.c: arm get_ucontext_sigreturn
  bsd-user/arm/signal.c: arm set_mcontext
  bsd-user/arm/signal.c: arm get_mcontext
  bsd-user/arm/signal.c: arm set_sigtramp_args
  bsd-user/arm/target_arch_signal.h: Define size of *context_t
  bsd-user/arm/target_arch_signal.h: arm machine context and trapframe for signals
  bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack
  bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl
  bsd-user/arm/target_arch_elf.h: arm get hwcap
  bsd-user/arm/target_arch_elf.h: arm defines for ELF
  bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread
  bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm
  bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space
  bsd-user/arm/target_arch_reg.h: Implement core dump register copying
  bsd-user/arm/target_arch_cpu.h: Implement system call dispatch
  bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions
  bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
  bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-08 09:37:59 -08:00
Richard Henderson afe3326258 Second RISC-V PR for QEMU 7.0
- Fix illegal instruction when PMP is disabled
  - SiFive PDMA 64-bit support
  - SiFive PLIC cleanups
  - Mark Hypervisor extension as non experimental
  - Enable Hypervisor extension by default
  - Support 32 cores on the virt machine
  - Corrections for the Vector extension
  - Experimental support for 128-bit CPUs
  - stval and mtval support for illegal instructions
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAmHZJhMACgkQIeENKd+X
 cFSzfgf9FTU3spDGSFMQXFdHfFionDbbyRhXqHG785/9193DKAZysSCv1PWrScX1
 i9GwbR963Z03ksGN0yGFleqZAE2wz6jQxzXPbikeL4kNH1CiBTP1HFUM194d4cLA
 4bjZ3l29obkzjD53mlQpi/0siqe3deKbuRu+z55LlS21C3SUkxggb5Fda+V0dzix
 h+Ytd7Qkif16aVDD20Q6O/4g8tZgqYvuDOdY78/V7VSzFd5bV1j8uONsDmp3NTWo
 l2vgMDxtv1f7uggtApNvTeWRHeLkDB3OMMHZHiXYceyIcqYvZecmMfRloVC7qY7t
 TOR378HVElPHJs9iJMzx7xlcJ5xHeQ==
 =ffGh
 -----END PGP SIGNATURE-----

Merge tag 'pull-riscv-to-apply-20220108' of github.com:alistair23/qemu into staging

Second RISC-V PR for QEMU 7.0

 - Fix illegal instruction when PMP is disabled
 - SiFive PDMA 64-bit support
 - SiFive PLIC cleanups
 - Mark Hypervisor extension as non experimental
 - Enable Hypervisor extension by default
 - Support 32 cores on the virt machine
 - Corrections for the Vector extension
 - Experimental support for 128-bit CPUs
 - stval and mtval support for illegal instructions

# gpg: Signature made Fri 07 Jan 2022 09:50:11 PM PST
# gpg:                using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8  CE8F 21E1 0D29 DF97 7054

* tag 'pull-riscv-to-apply-20220108' of github.com:alistair23/qemu: (37 commits)
  target/riscv: Implement the stval/mtval illegal instruction
  target/riscv: Fixup setting GVA
  target/riscv: Set the opcode in DisasContext
  target/riscv: actual functions to realize crs 128-bit insns
  target/riscv: modification of the trans_csrxx for 128-bit support
  target/riscv: helper functions to wrap calls to 128-bit csr insns
  target/riscv: adding high part of some csrs
  target/riscv: support for 128-bit M extension
  target/riscv: support for 128-bit arithmetic instructions
  target/riscv: support for 128-bit shift instructions
  target/riscv: support for 128-bit U-type instructions
  target/riscv: support for 128-bit bitwise instructions
  target/riscv: accessors to registers upper part and 128-bit load/store
  target/riscv: moving some insns close to similar insns
  target/riscv: setup everything for rv64 to support rv128 execution
  target/riscv: array for the 64 upper bits of 128-bit registers
  target/riscv: separation of bitwise logic and arithmetic helpers
  target/riscv: additional macros to check instruction support
  qemu/int128: addition of div/rem 128-bit operations
  exec/memop: Adding signed quad and octo defines
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:09:24 -08:00
Warner Losh 18fe5d99f2 bsd-user: add arm target build
CC: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Acked-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh ca4fc704a4 bsd-user/freebsd/target_os_ucontext.h: Require TARGET_*CONTEXT_SIZE
Now that all architecutres define TARGET_[MU]CONTEXT_SIZE, enforce
requiring them and always check the sizeof target_{u,m}context_t
sizes.

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh 3ac34cc985 bsd-user/arm/signal.c: arm get_ucontext_sigreturn
Update ucontext to implement sigreturn.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh d6d4509a9f bsd-user/arm/signal.c: arm set_mcontext
Move the machine context to the CPU state.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh 38ce1471c9 bsd-user/arm/signal.c: arm get_mcontext
Get the machine context from the CPU state.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh 781be8666c bsd-user/arm/signal.c: arm set_sigtramp_args
Implement set_sigtramp_args to setup the arguments to the sigtramp
calls.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00