43a9658889
Add the support needed for creating prstatus elf notes. This allows us to use QMP dump-guest-memory. Now ELF notes of RISC-V only contain prstatus elf notes. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Mingwang Li <limingwang@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 20210201124458.1248-2-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
37 lines
1.0 KiB
Meson
37 lines
1.0 KiB
Meson
# FIXME extra_args should accept files()
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dir = meson.current_source_dir()
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gen32 = [
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decodetree.process('insn16.decode', extra_args: [dir / 'insn16-32.decode', '--static-decode=decode_insn16', '--insnwidth=16']),
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decodetree.process('insn32.decode', extra_args: '--static-decode=decode_insn32'),
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]
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gen64 = [
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decodetree.process('insn16.decode', extra_args: [dir / 'insn16-64.decode', '--static-decode=decode_insn16', '--insnwidth=16']),
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decodetree.process('insn32.decode', extra_args: [dir / 'insn32-64.decode', '--static-decode=decode_insn32']),
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]
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riscv_ss = ss.source_set()
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riscv_ss.add(when: 'TARGET_RISCV32', if_true: gen32)
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riscv_ss.add(when: 'TARGET_RISCV64', if_true: gen64)
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riscv_ss.add(files(
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'cpu.c',
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'cpu_helper.c',
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'csr.c',
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'fpu_helper.c',
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'gdbstub.c',
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'op_helper.c',
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'vector_helper.c',
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'translate.c',
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))
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riscv_softmmu_ss = ss.source_set()
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riscv_softmmu_ss.add(files(
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'arch_dump.c',
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'pmp.c',
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'monitor.c',
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'machine.c'
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))
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target_arch += {'riscv': riscv_ss}
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target_softmmu_arch += {'riscv': riscv_softmmu_ss}
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