Edgar E. Iglesias 4ffb9ae2e1 cris: Mask interrupts on dslots for CRISv10. ...

CRISv10 cores (unlike v32) do not take any interrupts while delayed
jumps are pending (delay slots).

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>

2010-02-20 19:17:29 +01:00

..

cpu.h

cris: Add support for CRISv10 translation.

2010-02-15 12:18:57 +01:00

crisv10-decode.h

cris: Add support for CRISv10 translation.

2010-02-15 12:18:57 +01:00

crisv32-decode.h

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exec.h

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helper.c

cris: Add v10 style interrupts.

2010-02-15 11:47:34 +01:00

helper.h

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machine.c

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mmu.c

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mmu.h

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op_helper.c

crisv10: Always clear the V and C flags on btst.

2010-02-15 11:20:30 +01:00

opcode-cris.h

…

translate_v10.c

cris: Mask interrupts on dslots for CRISv10.

2010-02-20 19:17:29 +01:00

translate.c

cris: Add support for CRISv10 translation.

2010-02-15 12:18:57 +01:00