qemu-e2k/tcg/aarch64
Richard Henderson 7f89fdf8eb tcg/aarch64: Apple does not align __int128_t in even registers
From https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms

  When passing an argument with 16-byte alignment in integer registers,
  Apple platforms allow the argument to start in an odd-numbered xN
  register. The standard ABI requires it to begin in an even-numbered
  xN register.

Cc: qemu-stable@nongnu.org
Fixes: 5427a9a760 ("tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2169
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <9fc0c2c7-dd57-459e-aecb-528edb74b4a7@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-29 11:35:36 -10:00
..
tcg-target-con-set.h tcg/aarch64: Support TCG_COND_TST{EQ,NE} 2024-02-03 23:53:48 +00:00
tcg-target-con-str.h tcg/aarch64: Support TCG_COND_TST{EQ,NE} 2024-02-03 23:53:48 +00:00
tcg-target-reg-bits.h tcg: Split out tcg-target-reg-bits.h 2023-06-05 12:04:28 -07:00
tcg-target.c.inc tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX 2024-02-03 23:53:49 +00:00
tcg-target.h tcg/aarch64: Apple does not align __int128_t in even registers 2024-02-29 11:35:36 -10:00
tcg-target.opc.h tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec 2020-06-02 08:42:37 -07:00