Paolo Bonzini 139c1837db meson: rename included C source files to .c.inc ... With Makefiles that have automatically generated dependencies, you generated includes are set as dependencies of the Makefile, so that they are built before everything else and they are available when first building the .c files. Alternatively you can use a fine-grained dependency, e.g. target/arm/translate.o: target/arm/decode-neon-shared.inc.c With Meson you have only one choice and it is a third option, namely "build at the beginning of the corresponding target"; the way you express it is to list the includes in the sources of that target. The problem is that Meson decides if something is a source vs. a generated include by looking at the extension: '.c', '.cc', '.m', '.C' are sources, while everything else is considered an include---including '.inc.c'. Use '.c.inc' to avoid this, as it is consistent with our other convention of using '.rst.inc' for included reStructuredText files. The editorconfig file is adjusted. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2020-08-21 06:18:30 -04:00
..
insn_trans	meson: rename included C source files to .c.inc	2020-08-21 06:18:30 -04:00
cpu_bits.h	target/riscv: support vector extension csr	2020-07-02 09:19:32 -07:00
cpu_helper.c	target/riscv: Report errors validating 2nd-stage PTEs	2020-06-19 08:24:07 -07:00
cpu_user.h	Supply missing header guards	2019-06-12 13:20:21 +02:00
cpu-param.h	tcg: Split out target/arch/cpu-param.h	2019-06-10 07:03:34 -07:00
cpu.c	target/riscv: configure and turn on vector extension from command line	2020-07-02 09:19:34 -07:00
cpu.h	target/riscv: fix vill bit index in vtype register	2020-07-13 17:25:37 -07:00
csr.c	target/riscv: Fix the range of pmpcfg of CSR funcion table	2020-07-22 09:41:36 -07:00
fpu_helper.c	target/riscv: vector floating-point classify instructions	2020-07-02 09:19:33 -07:00
gdbstub.c	gdbstub: extend GByteArray to read register helpers	2020-03-17 17:38:38 +00:00
helper.h	target/riscv: vector compress instruction	2020-07-02 09:19:34 -07:00
insn16-32.decode
insn16-64.decode
insn16.decode
insn32-64.decode	target/riscv: add vector amo operations	2020-07-02 09:19:33 -07:00
insn32.decode	target/riscv: vector compress instruction	2020-07-02 09:19:34 -07:00
instmap.h	target/riscv: progressively load the instruction during decode	2020-02-25 20:20:23 +00:00
internals.h	target/riscv: integer scalar move instruction	2020-07-02 09:19:33 -07:00
Makefile.objs	meson: rename included C source files to .c.inc	2020-08-21 06:18:30 -04:00
monitor.c	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
op_helper.c	target/riscv: Implement checks for hfence	2020-06-19 08:24:07 -07:00
pmp.c	target/riscv: Fix pmp NA4 implementation	2020-07-13 17:25:37 -07:00
pmp.h	RISC-V: Check for the effective memory privilege mode during PMP checks	2019-06-23 23:44:41 -07:00
trace-events	target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events	2019-09-17 08:42:42 -07:00
trace.h	trace: switch position of headers to what Meson requires	2020-08-21 06:18:24 -04:00
translate.c	meson: rename included C source files to .c.inc	2020-08-21 06:18:30 -04:00
vector_helper.c	target/riscv/vector_helper: Fix build on 32-bit big endian hosts	2020-08-05 10:43:45 +02:00