qemu-e2k/linux-user/riscv
Kito Cheng 6b80cb25b4 riscv: Add semihosting support for user mode
This could made testing more easier and ARM/AArch64 has supported on
their linux user mode too, so I think it should be reasonable.

Verified GCC testsuite with newlib/semihosting.

Signed-off-by: Kito Cheng <kito.cheng@sifive.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210107170717.2098982-7-keithp@keithp.com>
Message-Id: <20210108224256.2321-18-alex.bennee@linaro.org>
2021-01-18 10:05:06 +00:00
..
cpu_loop.c riscv: Add semihosting support for user mode 2021-01-18 10:05:06 +00:00
signal.c linux-user/riscv: fix up struct target_ucontext definition 2020-04-29 13:16:37 -07:00
sockbits.h
syscall32_nr.h linux-user: update syscall_nr.h to Linux 5.9-rc7 2020-10-26 11:39:23 +01:00
syscall64_nr.h linux-user: update syscall_nr.h to Linux 5.9-rc7 2020-10-26 11:39:23 +01:00
syscall_nr.h
target_cpu.h
target_elf.h
target_fcntl.h
target_signal.h
target_structs.h
target_syscall.h linux-user: Add strace support for printing arguments of syscalls used to lock and unlock memory 2020-08-27 12:29:50 +02:00
termbits.h linux-user: Add generic 'termbits.h' for some archs 2020-08-27 12:29:50 +02:00