Alistair Francis 114baaca51 target/riscv: Specify the XLEN for CPUs ... Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: c1da66affbb83ec4a2fbeb0194293bd24d65f5dc.1608142916.git.alistair.francis@wdc.com		2020-12-17 21:56:44 -08:00
..
alpha	overall/alpha tcg cpus|hppa: Fix Lesser GPL version number	2020-11-15 16:43:54 +01:00
arm	arm/cpu64: Register "aarch64" as class property	2020-12-15 10:02:07 -05:00
avr
cris
hppa	overall/alpha tcg cpus|hppa: Fix Lesser GPL version number	2020-11-15 16:43:54 +01:00
i386	i386: tcg: remove inline from cpu_load_eflags	2020-12-16 15:50:33 -05:00
lm32	nomaintainer: Fix Lesser GPL version number	2020-11-15 17:04:40 +01:00
m68k	m68k: fix some comment spelling errors	2020-12-12 18:12:43 +01:00
microblaze	target/microblaze: Fix possible array out of bounds in mmu_write()	2020-11-17 09:45:24 +01:00
mips	target/mips: Use FloatRoundMode enum for FCR31 modes conversion	2020-12-13 20:27:11 +01:00
moxie
nios2	target/nios2: Use deposit32() to update ipending register	2020-12-15 12:04:30 +00:00
openrisc	target/openrisc: Move pic_cpu code into CPU object proper	2020-12-15 12:04:30 +00:00
ppc	target/ppc: Introduce an mmu_is_64bit() helper	2020-12-14 15:54:12 +11:00
riscv	target/riscv: Specify the XLEN for CPUs	2020-12-17 21:56:44 -08:00
rx
s390x	First set of 6.0 patches for s390x:	2020-12-11 22:22:50 +00:00
sh4
sparc	sparc: Check dev->realized at sparc_set_nwindows()	2020-12-15 10:02:07 -05:00
tilegx	nomaintainer: Fix Lesser GPL version number	2020-11-15 17:04:40 +01:00
tricore	tricore tcg cpus: Fix Lesser GPL version number	2020-11-15 16:40:30 +01:00
unicore32
xtensa
meson.build