f6bfe45af2
I/O currently being synchronous, there is no reason to ever clear the SR_TXE bit. However the SR_TC bit may be cleared by software writing to the SR register, so set it on each write. In addition, fix the reset value of the USART status register. Signed-off-by: Richard Braun <rbraun@sceen.net> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> [PMM: removed XXX tag from comment, since it isn't something we need to come back and fix in QEMU] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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.. | ||
bcm2835_aux.c | ||
cadence_uart.c | ||
cmsdk-apb-uart.c | ||
debugcon.c | ||
digic-uart.c | ||
escc.c | ||
etraxfs_ser.c | ||
exynos4210_uart.c | ||
grlib_apbuart.c | ||
imx_serial.c | ||
ipoctal232.c | ||
lm32_juart.c | ||
lm32_uart.c | ||
Makefile.objs | ||
mcf_uart.c | ||
milkymist-uart.c | ||
omap_uart.c | ||
parallel.c | ||
pl011.c | ||
sclpconsole-lm.c | ||
sclpconsole.c | ||
serial-isa.c | ||
serial-pci.c | ||
serial.c | ||
sh_serial.c | ||
spapr_vty.c | ||
stm32f2xx_usart.c | ||
terminal3270.c | ||
trace-events | ||
virtio-console.c | ||
virtio-serial-bus.c | ||
xen_console.c | ||
xilinx_uartlite.c |