OpenE2K/qemu-e2k
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12703d4e75
qemu-e2k/target/i386
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Yang Weijiang 12703d4e75 target/i386: Add MSR access interface for Arch LBR 
In the first generation of Arch LBR, the max support
Arch LBR depth is 32, both host and guest use the value
to set depth MSR. This can simplify the implementation
of patch given the side-effect of mismatch of host/guest
depth MSR: XRSTORS will reset all recording MSRs to 0s
if the saved depth mismatches MSR_ARCH_LBR_DEPTH.

In most of the cases Arch LBR is not in active status,
so check the control bit before save/restore the big
chunck of Arch LBR MSRs.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220215195258.29149-7-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-14 12:32:41 +02:00
..
hax Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
hvf Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
kvm target/i386: Add MSR access interface for Arch LBR 2022-05-14 12:32:41 +02:00
nvmm Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
tcg target/i386: Suppress coverity warning on fsave/frstor 2022-04-26 19:59:51 -07:00
whpx WHPX: fixed TPR/CR8 translation issues affecting VM debugging 2022-05-14 12:32:40 +02:00
arch_dump.c dump: add kernel_gs_base to QEMU CPU state 2018-07-16 16:13:34 +02:00
arch_memory_mapping.c exec,dump,i386,ppc,s390x: don't include exec/cpu-all.h explicitly 2017-09-19 18:21:33 +02:00
cpu-dump.c monitor: Trim some trailing space from human-readable output 2021-10-31 21:05:40 +01:00
cpu-internal.h i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu-sysemu.c Use g_new() & friends where that makes obvious sense 2022-03-21 15:44:44 +01:00
cpu.c target/i386: Add XSAVES support for Arch LBR 2022-05-14 12:32:41 +02:00
cpu.h target/i386: Add MSR access interface for Arch LBR 2022-05-14 12:32:41 +02:00
gdbstub.c target/i386: fix byte swap issue with XMM register access 2022-04-20 16:04:20 +01:00
helper.c * Improve virtio-net failover test 2022-02-22 13:07:32 +00:00
helper.h target/i386: Drop check for singlestep_enabled 2021-10-15 16:39:14 -07:00
host-cpu.c i386: do not call cpudef-only models functions for max, host, base 2021-07-23 15:47:13 +02:00
host-cpu.h accel-cpu: make cpu_realizefn return a bool 2021-05-10 15:41:50 -04:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c x86: Support XFD and AMX xsave data migration 2022-03-15 11:50:50 +01:00
meson.build target/i386/sev: Remove stubs by using code elision 2021-10-13 10:47:49 +02:00
monitor.c monitor: remove 'info ioapic' HMP command 2021-11-02 15:55:13 +00:00
ops_sse_header.h tcg: Remove dh_alias indirection for dh_typecode 2022-02-28 08:04:06 -10:00
ops_sse.h i386: pcmpestr 64-bit sign extension bug 2022-04-28 08:51:56 +02:00
sev-sysemu-stub.c monitor: Reduce hmp_info_sev() declaration 2021-10-13 10:47:49 +02:00
sev.c qapi, target/i386/sev: Add cpu0-id to query-sev-capabilities 2022-04-06 10:50:37 +02:00
sev.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
shift_helper_template.h x86 tcg cpus: Fix Lesser GPL version number 2020-11-15 16:41:42 +01:00
svm.h target/i386: Added vVMLOAD and vVMSAVE feature 2021-09-13 13:56:26 +02:00
trace-events * Update the references to some doc files (use *.rst instead of *.txt) 2021-06-02 17:08:11 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
xsave_helper.c x86: add support for KVM_CAP_XSAVE2 and AMX state migration 2022-03-15 11:50:50 +01:00