qemu-e2k/include/hw/arm
Peter Maydell 761c532ab1 target/arm: Make boards pass base address to armv7m_load_kernel()
Currently armv7m_load_kernel() takes the size of the block of memory
where it should load the initial guest image, but assumes that it
should always load it at address 0.  This happens to be true of all
our M-profile boards at the moment, but it isn't guaranteed to always
be so: M-profile CPUs can be configured (via init-svtor and
init-nsvtor, which match equivalent hardware configuration signals)
to have the initial vector table at any address, not just zero.  (For
instance the Teeny board has the boot ROM at address 0x0200_0000.)

Add a base address argument to armv7m_load_kernel(), so that
callers now pass in both base address and size. All the current
callers pass 0, so this is not a behaviour change.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220823160417.3858216-3-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-09-14 11:19:40 +01:00
..
allwinner-a10.h
allwinner-h3.h
armsse-version.h
armsse.h
armv7m.h
aspeed_soc.h aspeed: Make aspeed_board_init_flashes public 2022-07-14 16:24:38 +02:00
aspeed.h
bcm2835_peripherals.h Align Raspberry Pi DMA interrupts with Linux DTS 2022-07-18 13:25:13 +01:00
bcm2836.h
boot.h target/arm: Make boards pass base address to armv7m_load_kernel() 2022-09-14 11:19:40 +01:00
digic.h
exynos4210.h hw/arm/exynos4210: Drop Exynos4210Irq struct 2022-04-21 11:37:04 +01:00
fdt.h
fsl-imx6.h
fsl-imx6ul.h
fsl-imx7.h
fsl-imx25.h
fsl-imx31.h
linux-boot-if.h
msf2-soc.h
npcm7xx.h hw/arm: Add Nuvoton SD module to board 2021-11-02 14:14:55 -04:00
nrf51_soc.h
nrf51.h
omap.h
primecell.h
pxa.h
raspi_platform.h
sharpsl.h
smmu-common.h hw/arm/smmuv3: Cache event fault record 2022-04-28 13:57:33 +01:00
smmuv3.h
soc_dma.h
stm32f100_soc.h
stm32f205_soc.h
stm32f405_soc.h
virt.h hw/arm/virt: dt: add rng-seed property 2022-07-07 11:36:07 +01:00
xlnx-versal.h hw/arm: versal: Connect the CRL 2022-04-21 11:37:03 +01:00
xlnx-zynqmp.h hw/arm/xlnx-zynqmp: Connect 4 TTC timers 2022-04-21 11:37:03 +01:00