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qemu-e2k/target-mips
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Yongbok Kim cb269f273f target-mips: fix multiple TCG registers covering same data 
Avoid to allocate different TCG registers for the FPU registers
that are mapped on the MSA vectore registers.

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-11-07 14:15:28 +00:00
..
cpu-qom.h target-mips: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
cpu.c gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag 2014-10-06 14:25:43 +01:00
cpu.h mips: Add macros for CP0.Config3 and CP0.Config4 bits 2014-11-07 14:15:28 +00:00
dsp_helper.c target-mips/dsp_helper.c: Add ifdef guards around various functions 2014-10-14 13:29:14 +01:00
gdbstub.c target-mips: remove duplicated mips/ieee mapping function 2014-11-03 11:48:35 +00:00
helper.c target-mips: add MSA exceptions 2014-11-03 11:48:35 +00:00
helper.h target-mips: add MSA MI10 format instructions 2014-11-03 11:48:35 +00:00
kvm_mips.h
kvm.c mips/kvm: Disable FPU on reset with KVM 2014-07-09 18:17:04 +02:00
lmi_helper.c
machine.c target-mips: update cpu_save/cpu_load to support new registers 2014-11-03 11:48:34 +00:00
Makefile.objs target-mips: add msa_helper.c 2014-11-03 11:48:35 +00:00
mips-defs.h target-mips: add MSA defines and data structure 2014-11-03 11:48:35 +00:00
msa_helper.c target-mips: add MSA 2RF format instructions 2014-11-03 11:48:35 +00:00
op_helper.c target-mips: add MSA MI10 format instructions 2014-11-03 11:48:35 +00:00
TODO
translate_init.c mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits 2014-11-07 14:15:28 +00:00
translate.c target-mips: fix multiple TCG registers covering same data 2014-11-07 14:15:28 +00:00