qemu-e2k/target/riscv
Rajnesh Kanwal 1697837ed9 target/riscv: Add M-mode virtual interrupt and IRQ filtering support.
This change adds support for inserting virtual interrupts from M-mode
into S-mode using mvien and mvip csrs. IRQ filtering is a use case of
this change, i-e M-mode can stop delegating an interrupt to S-mode and
instead enable it in MIE and receive those interrupts in M-mode and then
selectively inject the interrupt using mvien and mvip.

Also, the spec doesn't mandate the interrupt to be actually supported
in hardware. Which allows M-mode to assert virtual interrupts to S-mode
that have no connection to any real interrupt events.

This is defined as part of the AIA specification [0], "5.3 Interrupt
filtering and virtual interrupts for supervisor level".

[0]: https://github.com/riscv/riscv-aia/releases/download/1.0/riscv-interrupts-1.0.pdf

Signed-off-by: Rajnesh Kanwal <rkanwal@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20231016111736.28721-6-rkanwal@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-07 11:02:17 +10:00
..
insn_trans target/riscv: rename ext_icboz to ext_zicboz 2023-11-07 11:02:17 +10:00
kvm target/riscv: rename ext_icboz to ext_zicboz 2023-11-07 11:02:17 +10:00
tcg target/riscv: Set VS* bits to one in mideleg when H-Ext is enabled 2023-11-07 11:02:17 +10:00
arch_dump.c
bitmanip_helper.c
common-semi-target.h
cpu_bits.h target/riscv: Add M-mode virtual interrupt and IRQ filtering support. 2023-11-07 11:02:17 +10:00
cpu_cfg.h target/riscv: rename ext_icboz to ext_zicboz 2023-11-07 11:02:17 +10:00
cpu_helper.c target/riscv: Add M-mode virtual interrupt and IRQ filtering support. 2023-11-07 11:02:17 +10:00
cpu_user.h
cpu_vendorid.h
cpu-param.h
cpu-qom.h target/riscv: add 'max' CPU type 2023-10-12 11:39:33 +10:00
cpu.c target/riscv: Add M-mode virtual interrupt and IRQ filtering support. 2023-11-07 11:02:17 +10:00
cpu.h target/riscv: Add M-mode virtual interrupt and IRQ filtering support. 2023-11-07 11:02:17 +10:00
crypto_helper.c target/riscv: Use accelerated helper for AES64KS1I 2023-09-11 11:45:55 +10:00
csr.c target/riscv: Add M-mode virtual interrupt and IRQ filtering support. 2023-11-07 11:02:17 +10:00
debug.c target/riscv: Allocate itrigger timers only once 2023-09-11 11:45:55 +10:00
debug.h target/riscv: Allocate itrigger timers only once 2023-09-11 11:45:55 +10:00
fpu_helper.c riscv: Add support for the Zfa extension 2023-07-10 22:29:20 +10:00
gdbstub.c target/riscv: rename ext_icsr to ext_zicsr 2023-11-07 11:02:17 +10:00
helper.h target/riscv: Add Zvksed ISA extension support 2023-09-11 11:45:55 +10:00
insn16.decode
insn32.decode target/riscv: Add Zvksed ISA extension support 2023-09-11 11:45:55 +10:00
instmap.h
internals.h
Kconfig
m128_helper.c target/helpers: Remove unnecessary 'qemu/main-loop.h' header 2023-08-31 19:47:43 +02:00
machine.c target/riscv: Add M-mode virtual interrupt and IRQ filtering support. 2023-11-07 11:02:17 +10:00
meson.build target/riscv: move KVM only files to kvm subdir 2023-10-12 12:20:24 +10:00
monitor.c riscv: spelling fixes 2023-09-08 13:08:52 +03:00
op_helper.c target/helpers: Remove unnecessary 'qemu/main-loop.h' header 2023-08-31 19:47:43 +02:00
pmp.c target/riscv/pmp.c: respect mseccfg.RLB for pmpaddrX changes 2023-09-11 11:45:55 +10:00
pmp.h
pmu.c target/riscv/pmu: Restrict 'qemu/log.h' include to source 2023-08-31 19:47:43 +02:00
pmu.h target/helpers: Remove unnecessary 'qemu/main-loop.h' header 2023-08-31 19:47:43 +02:00
riscv-qmp-cmds.c
sbi_ecall_interface.h
time_helper.c
time_helper.h
trace-events
trace.h
translate.c accel/tcg: Replace CPUState.env_ptr with cpu_env() 2023-10-04 11:03:54 -07:00
vcrypto_helper.c target/riscv: Add Zvksed ISA extension support 2023-09-11 11:45:55 +10:00
vector_helper.c target/riscv: Fix vfwmaccbf16.vf 2023-10-12 12:50:13 +10:00
vector_internals.c target/riscv: Refactor some of the generic vector functionality 2023-09-11 11:45:54 +10:00
vector_internals.h target/riscv: Refactor some of the generic vector functionality 2023-09-11 11:45:55 +10:00
xthead.decode
XVentanaCondOps.decode
zce_helper.c