c8885b8839
Regarding the patchset v3 has been merged into main line, and not
approved, this patch updates to patchset v4.
Fixes: b4bda200 ("target/loongarch: Adjust the layout of hardware flags bit fields")
Link: https://lists.nongnu.org/archive/html/qemu-devel/2022-11/msg00808.html
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Rui Wang <wangrui@loongson.cn>
Message-Id: <20221107024526.702297-2-wangrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
|
/*
|
|
* LoongArch translation routines.
|
|
*
|
|
* Copyright (c) 2021 Loongson Technology Corporation Limited
|
|
*/
|
|
|
|
#ifndef TARGET_LOONGARCH_TRANSLATE_H
|
|
#define TARGET_LOONGARCH_TRANSLATE_H
|
|
|
|
#include "exec/translator.h"
|
|
|
|
#define TRANS(NAME, FUNC, ...) \
|
|
static bool trans_##NAME(DisasContext *ctx, arg_##NAME * a) \
|
|
{ return FUNC(ctx, a, __VA_ARGS__); }
|
|
|
|
/*
|
|
* If an operation is being performed on less than TARGET_LONG_BITS,
|
|
* it may require the inputs to be sign- or zero-extended; which will
|
|
* depend on the exact operation being performed.
|
|
*/
|
|
typedef enum {
|
|
EXT_NONE,
|
|
EXT_SIGN,
|
|
EXT_ZERO,
|
|
} DisasExtend;
|
|
|
|
typedef struct DisasContext {
|
|
DisasContextBase base;
|
|
target_ulong page_start;
|
|
uint32_t opcode;
|
|
uint16_t mem_idx;
|
|
uint16_t plv;
|
|
TCGv zero;
|
|
/* Space for 3 operands plus 1 extra for address computation. */
|
|
TCGv temp[4];
|
|
uint8_t ntemp;
|
|
} DisasContext;
|
|
|
|
void generate_exception(DisasContext *ctx, int excp);
|
|
|
|
extern TCGv cpu_gpr[32], cpu_pc;
|
|
extern TCGv_i32 cpu_fscr0;
|
|
extern TCGv_i64 cpu_fpr[32];
|
|
|
|
#endif
|