Paolo Bonzini 1d0efbdb35 target/i386: reimplement 0x0f 0xd8-0xdf, 0xe8-0xef, 0xf8-0xff, add AVX ... These are more simple integer instructions present in both MMX and SSE/AVX, with no holes that were later occupied by newer instructions. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2022-10-18 13:58:04 +02:00
..
sysemu	target/i386: Use probe_access_full for final stage2 translation	2022-10-18 13:58:04 +02:00
user	target/i386: Raise #GP on unaligned m128 accesses when required.	2022-09-18 09:17:40 +02:00
bpt_helper.c	compiler.h: replace QEMU_NORETURN with G_NORETURN	2022-04-21 17:03:51 +04:00
cc_helper_template.h
cc_helper.c
decode-new.c.inc	target/i386: reimplement 0x0f 0xd8-0xdf, 0xe8-0xef, 0xf8-0xff, add AVX	2022-10-18 13:58:04 +02:00
decode-new.h	target/i386: validate SSE prefixes directly in the decoding table	2022-10-18 13:58:04 +02:00
emit.c.inc	target/i386: reimplement 0x0f 0xd8-0xdf, 0xe8-0xef, 0xf8-0xff, add AVX	2022-10-18 13:58:04 +02:00
excp_helper.c	target/i386: Raise #GP on unaligned m128 accesses when required.	2022-09-18 09:17:40 +02:00
fpu_helper.c	target/i386: Introduce 256-bit vector helpers	2022-10-18 13:58:04 +02:00
helper-tcg.h	target/i386: Raise #GP on unaligned m128 accesses when required.	2022-09-18 09:17:40 +02:00
int_helper.c	exec/exec-all: Move 'qemu/log.h' include in units requiring it	2022-02-21 10:18:06 +01:00
mem_helper.c
meson.build
misc_helper.c	compiler.h: replace QEMU_NORETURN with G_NORETURN	2022-04-21 17:03:51 +04:00
mpx_helper.c
seg_helper.c	target/i386: Truncate values for lcall_real to i32	2022-10-11 09:36:01 +02:00
seg_helper.h
tcg-cpu.c	target/i386: Enable TARGET_TB_PCREL	2022-10-11 09:36:01 +02:00
tcg-cpu.h
tcg-stub.c
translate.c	target/i386: reimplement 0x0f 0xd8-0xdf, 0xe8-0xef, 0xf8-0xff, add AVX	2022-10-18 13:58:04 +02:00