qemu-e2k/target
Richard Henderson 1db8af5c87 target/ppc: Implement ppc_cpu_record_sigsegv
Record DAR, DSISR, and exception_index.  That last means
that we must exit to cpu_loop ourselves, instead of letting
exception_index being overwritten.

This is exactly what the user-mode ppc_cpu_tlb_fill does,
so simply rename it as ppc_cpu_record_sigsegv.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02 07:00:52 -04:00
..
alpha target/alpha: Implement alpha_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00
arm target/arm: Implement arm_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00
avr target/avr: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
cris target/cris: Make cris_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
hexagon target/hexagon: Remove hexagon_cpu_tlb_fill 2021-11-02 07:00:52 -04:00
hppa target/hppa: Make hppa_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
i386 target/i386: Implement x86_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00
m68k target/m68k: Make m68k_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
microblaze target/microblaze: Make mb_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
mips target/mips: Make mips_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
nios2 target/nios2: Implement nios2_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00
openrisc target/openrisc: Make openrisc_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
ppc target/ppc: Implement ppc_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00
riscv target/riscv: change the api for RVF/RVD fmin/fmax 2021-10-29 16:56:12 +10:00
rx target/rx: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
s390x target/s390x: Drop check for singlestep_enabled 2021-10-15 16:39:14 -07:00
sh4 target/sh4: Drop check for singlestep_enabled 2021-10-15 16:39:14 -07:00
sparc target/sparc: Use cpu_*_mmu instead of helper_*_mmu 2021-10-13 08:45:13 -07:00
tricore target/tricore: Drop check for singlestep_enabled 2021-10-15 16:39:14 -07:00
xtensa target/xtensa: Drop check for singlestep_enabled 2021-10-15 16:39:15 -07:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build