qemu-e2k/target
Fredrik Noring 21e8e8b230 target/mips: Support R5900 three-operand MULT and MULTU instructions
The three-operand MULT and MULTU are the only R5900-specific
instructions emitted by GCC 7.3. The R5900 also implements the three-
operand MADD and MADDU instructions, but they are omitted in QEMU for
now since they are absent in programs compiled by current GCC versions.

Likewise, the R5900-specific pipeline 1 instruction variants MULT1,
MULTU1, DIV1, DIVU1, MADD1, MADDU1, MFHI1, MFLO1, MTHI1 and MTLO1
are omitted here as well.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24 15:20:31 +02:00
..
alpha target/alpha: remove tlb_flush from alpha_cpu_initfn 2018-10-18 18:58:10 -07:00
arm target/arm: Check HAVE_CMPXCHG128 at translate time 2018-10-18 19:46:53 -07:00
cris target/cris/translate: Get rid of qemu_log_separate() 2018-10-16 17:57:23 +02:00
hppa target/hppa: Raise exception 26 on emulated hardware 2018-10-16 15:32:22 -07:00
i386 Error reporting patches for 2018-10-22 2018-10-23 17:20:23 +01:00
lm32
m68k
microblaze
mips target/mips: Support R5900 three-operand MULT and MULTU instructions 2018-10-24 15:20:31 +02:00
moxie
nios2
openrisc
ppc Error reporting patches for 2018-10-22 2018-10-23 17:20:23 +01:00
riscv riscv: remove define cpu_init() 2018-09-05 09:58:38 -07:00
s390x target/s390x: Check HAVE_ATOMIC128 and HAVE_CMPXCHG128 at translate 2018-10-18 19:46:53 -07:00
sh4
sparc
tilegx
tricore
unicore32 target/unicore32: remove tlb_flush from uc32_init_fn 2018-10-18 18:58:10 -07:00
xtensa target/xtensa: extract gen_check_interrupts call 2018-10-01 11:08:36 -07:00