qemu-e2k/tcg
Richard Henderson dad2f2f5af tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32
Since a59a293126 ("tcg/sparc64: Remove sparc32plus constraints")
we no longer distinguish registers with 32 vs 64 bits.
Therefore we can remove support for the backend-specific
type change opcodes.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-08-29 09:57:39 -07:00
..
aarch64 tcg: spelling fixes 2023-08-24 11:22:42 -07:00
arm tcg: spelling fixes 2023-08-24 11:22:42 -07:00
i386 tcg/i386: Implement negsetcond_* 2023-08-24 11:22:42 -07:00
loongarch64 tcg: Introduce negsetcond opcodes 2023-08-24 11:22:42 -07:00
mips tcg: Introduce negsetcond opcodes 2023-08-24 11:22:42 -07:00
ppc tcg/ppc: Use the Set Boolean Extension 2023-08-24 11:22:42 -07:00
riscv tcg: spelling fixes 2023-08-24 11:22:42 -07:00
s390x tcg/s390x: Implement negsetcond_* 2023-08-24 11:22:42 -07:00
sparc64 tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32 2023-08-29 09:57:39 -07:00
tci tcg: Introduce negsetcond opcodes 2023-08-24 11:22:42 -07:00
meson.build meson: Replace softmmu_ss -> system_ss 2023-06-20 10:01:30 +02:00
optimize.c tcg: Introduce negsetcond opcodes 2023-08-24 11:22:42 -07:00
region.c
tcg-common.c
tcg-internal.h
tcg-ldst.c.inc
tcg-op-gvec.c tcg: Use tcg_gen_negsetcond_* 2023-08-24 11:22:42 -07:00
tcg-op-ldst.c tcg: Use HAVE_CMPXCHG128 instead of CONFIG_CMPXCHG128 2023-07-15 08:02:49 +01:00
tcg-op-vec.c tcg: Remove vecop_list check from tcg_gen_not_vec 2023-08-29 09:57:39 -07:00
tcg-op.c tcg/tcg-op: Document wswap_i64() byte pattern 2023-08-24 11:22:42 -07:00
tcg-pool.c.inc
tcg.c tcg: Introduce negsetcond opcodes 2023-08-24 11:22:42 -07:00
tci.c