Richard Henderson 2b2ae0a42e tcg/loongarch64: Use C_N2_I1 for INDEX_op_qemu_ld_a*_i128 ... Use new registers for the output, so that we never overlap the input address, which could happen for user-only. This avoids a "tmp = addr + 0" in that case. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jiajie Chen <c@jia.je> Message-Id: <20230916220151.526140-3-richard.henderson@linaro.org>		2023-11-06 08:27:21 -08:00
..
aarch64	tcg/aarch64: Use tcg_use_softmmu	2023-10-22 16:32:28 -07:00
arm	tcg/arm: Use tcg_use_softmmu	2023-10-22 16:32:28 -07:00
i386	tcg/i386: Use tcg_use_softmmu	2023-10-22 16:32:28 -07:00
loongarch64	tcg/loongarch64: Use C_N2_I1 for INDEX_op_qemu_ld_a*_i128	2023-11-06 08:27:21 -08:00
mips	tcg/mips: Use tcg_use_softmmu	2023-10-22 16:32:28 -07:00
ppc	tcg/ppc: Use tcg_use_softmmu	2023-10-22 16:32:28 -07:00
riscv	tcg/riscv: Use tcg_use_softmmu	2023-10-22 16:32:28 -07:00
s390x	tcg/s390x: Use tcg_use_softmmu	2023-10-22 16:32:28 -07:00
sparc64	tcg: Correct invalid mentions of 'softmmu' by 'system-mode'	2023-10-07 19:02:33 +02:00
tci
meson.build	tcg: Correct invalid mentions of 'softmmu' by 'system-mode'	2023-10-07 19:02:33 +02:00
optimize.c	tcg: Optimize past conditional branches	2023-10-22 16:32:28 -07:00
region.c	tcg: Correct invalid mentions of 'softmmu' by 'system-mode'	2023-10-07 19:02:33 +02:00
tcg-common.c
tcg-internal.h
tcg-ldst.c.inc
tcg-op-gvec.c	tcg: Rename cpu_env to tcg_env	2023-10-03 08:01:02 -07:00
tcg-op-ldst.c	tcg: Export tcg_gen_ext_{i32,i64,tl}	2023-10-22 16:32:28 -07:00
tcg-op-vec.c
tcg-op.c	tcg: add negsetcondi	2023-10-22 16:32:28 -07:00
tcg-pool.c.inc
tcg.c	tcg: Add C_N2_I1	2023-11-06 08:27:21 -08:00
tci.c