qemu-e2k/include/hw/arm
Peter Maydell 2bd84b6818 hw/arm/exynos4210: Use TYPE_OR_IRQ instead of custom OR-gate device
The Exynos4210 SoC device currently uses a custom device
"exynos4210.irq_gate" to model the OR gate that feeds each CPU's IRQ
line.  We have a standard TYPE_OR_IRQ device for this now, so use
that instead.

(This is a migration compatibility break, but that is OK for this
machine type.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220404154658.565020-2-peter.maydell@linaro.org
2022-04-21 11:37:03 +01:00
..
allwinner-a10.h
allwinner-h3.h
armsse-version.h
armsse.h
armv7m.h
aspeed_soc.h ast2600: Add Secure Boot Controller model 2022-02-26 18:40:51 +01:00
aspeed.h
bcm2835_peripherals.h
bcm2836.h
boot.h hw/arm/boot: Drop nb_cpus field from arm_boot_info 2022-02-08 10:56:28 +00:00
digic.h
exynos4210.h hw/arm/exynos4210: Use TYPE_OR_IRQ instead of custom OR-gate device 2022-04-21 11:37:03 +01:00
fdt.h
fsl-imx6.h
fsl-imx6ul.h
fsl-imx7.h
fsl-imx25.h
fsl-imx31.h
linux-boot-if.h
msf2-soc.h
npcm7xx.h
nrf51_soc.h
nrf51.h
omap.h
primecell.h
pxa.h
raspi_platform.h
sharpsl.h
smmu-common.h
smmuv3.h
soc_dma.h
stm32f100_soc.h
stm32f205_soc.h
stm32f405_soc.h
sysbus-fdt.h
virt.h hw/arm/virt: Disable LPA2 for -machine virt-6.2 2022-03-07 14:32:21 +00:00
xlnx-versal.h hw/arm: versal: Connect the CRL 2022-04-21 11:37:03 +01:00
xlnx-zynqmp.h hw/arm/xlnx-zynqmp: Connect 4 TTC timers 2022-04-21 11:37:03 +01:00