2e2a1b4648
If the GIC interrupt mask is changed by a write to the smask (set mask) or rmask (reset mask) registers, we need to re-evaluate the state of the pins/IRQs fed to the CPU. Without doing so we risk leaving a pin high despite the interrupt that led to that state being masked, or losing interrupts if an already pending interrupt is unmasked. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> |
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.. | ||
allwinner-a10-pic.c | ||
apic_common.c | ||
apic.c | ||
arm_gic_common.c | ||
arm_gic_kvm.c | ||
arm_gic.c | ||
arm_gicv2m.c | ||
arm_gicv3_common.c | ||
arm_gicv3_cpuif.c | ||
arm_gicv3_dist.c | ||
arm_gicv3_its_common.c | ||
arm_gicv3_its_kvm.c | ||
arm_gicv3_kvm.c | ||
arm_gicv3_redist.c | ||
arm_gicv3.c | ||
armv7m_nvic.c | ||
aspeed_vic.c | ||
bcm2835_ic.c | ||
bcm2836_control.c | ||
etraxfs_pic.c | ||
exynos4210_combiner.c | ||
exynos4210_gic.c | ||
gic_internal.h | ||
gicv3_internal.h | ||
grlib_irqmp.c | ||
heathrow_pic.c | ||
i8259_common.c | ||
i8259.c | ||
imx_avic.c | ||
intc.c | ||
ioapic_common.c | ||
ioapic.c | ||
lm32_pic.c | ||
Makefile.objs | ||
mips_gic.c | ||
nios2_iic.c | ||
omap_intc.c | ||
openpic_kvm.c | ||
openpic.c | ||
pl190.c | ||
puv3_intc.c | ||
realview_gic.c | ||
s390_flic_kvm.c | ||
s390_flic.c | ||
sh_intc.c | ||
slavio_intctl.c | ||
trace-events | ||
vgic_common.h | ||
xics_kvm.c | ||
xics_spapr.c | ||
xics.c | ||
xilinx_intc.c |