b6c80037ed
PnvChip is typedef'ed in five places, and PnvPhb4PecState in two. Keep one, drop the others. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221222104628.659681-5-armbru@redhat.com>
73 lines
1.8 KiB
C
73 lines
1.8 KiB
C
/*
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* QEMU PowerPC PowerNV CPU Core model
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*
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* Copyright (c) 2016, IBM Corporation.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public License
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* as published by the Free Software Foundation; either version 2.1 of
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* the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef PPC_PNV_CORE_H
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#define PPC_PNV_CORE_H
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#include "hw/cpu/core.h"
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#include "target/ppc/cpu.h"
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#include "hw/ppc/pnv.h"
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#include "qom/object.h"
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#define TYPE_PNV_CORE "powernv-cpu-core"
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OBJECT_DECLARE_TYPE(PnvCore, PnvCoreClass,
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PNV_CORE)
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struct PnvCore {
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/*< private >*/
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CPUCore parent_obj;
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/*< public >*/
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PowerPCCPU **threads;
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uint32_t pir;
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uint64_t hrmor;
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PnvChip *chip;
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MemoryRegion xscom_regs;
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};
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struct PnvCoreClass {
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DeviceClass parent_class;
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const MemoryRegionOps *xscom_ops;
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};
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#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
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#define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX
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typedef struct PnvCPUState {
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Object *intc;
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} PnvCPUState;
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static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu)
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{
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return (PnvCPUState *)cpu->machine_data;
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}
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#define TYPE_PNV_QUAD "powernv-cpu-quad"
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OBJECT_DECLARE_SIMPLE_TYPE(PnvQuad, PNV_QUAD)
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struct PnvQuad {
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DeviceState parent_obj;
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uint32_t quad_id;
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MemoryRegion xscom_regs;
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};
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#endif /* PPC_PNV_CORE_H */
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