qemu-e2k/disas
Alvin Chang cffa995490 disas/riscv: Fix the typo of inverted order of pmpaddr13 and pmpaddr14
Fix the inverted order of pmpaddr13 and pmpaddr14 in csr_name().

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20230907084500.328-1-alvinga@andestech.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-10-12 11:53:47 +10:00
..
alpha.c
capstone.c disas: use result of ->read_memory_func 2022-10-06 11:53:40 +01:00
cris.c
disas-internal.h disas: Move softmmu specific code to separate file 2023-05-11 09:49:55 +01:00
disas-mon.c disas: Move softmmu specific code to separate file 2023-05-11 09:49:55 +01:00
disas.c disas: Move disas.c into the target-independent source set 2023-05-11 09:51:07 +01:00
hexagon.c Hexagon (disas/hexagon.c) fix memory leak for early exit cases 2021-08-12 09:06:05 -05:00
hppa.c disas/: fix some comment spelling errors 2020-09-17 20:40:08 +02:00
m68k.c disas/m68k: clean up local variable shadowing 2023-09-29 10:07:21 +02:00
meson.build disas/riscv: Add support for XThead* instructions 2023-07-10 22:29:14 +10:00
microblaze.c
mips.c disas/mips: Fix branch displacement for BEQZC and BNEZC 2022-10-31 11:32:07 +01:00
nanomips.c disas/nanomips: Tidy read for 48-bit opcodes 2022-11-08 01:04:25 +01:00
nios2.c disas/nios2: Simplify endianess conversion 2021-10-22 18:07:30 +02:00
riscv-xthead.c disas/riscv: Add support for XThead* instructions 2023-07-10 22:29:14 +10:00
riscv-xthead.h disas/riscv: Add support for XThead* instructions 2023-07-10 22:29:14 +10:00
riscv-xventana.c disas/riscv: Add support for XVentanaCondOps 2023-07-10 22:29:14 +10:00
riscv-xventana.h disas/riscv: Add support for XVentanaCondOps 2023-07-10 22:29:14 +10:00
riscv.c disas/riscv: Fix the typo of inverted order of pmpaddr13 and pmpaddr14 2023-10-12 11:53:47 +10:00
riscv.h riscv/disas: Fix disas output of upper immediates 2023-07-19 14:30:04 +10:00
sh4.c
sparc.c
xtensa.c