OpenE2K/qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity
34cccb7462
qemu-e2k/target/rx
History
Richard Henderson 4ba2565831 Fix usp/isp swapping upon clrpsw/setpsw. 
Fix psw.i/pc upon wait.
 Align dtb in ram.
 -----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmJhlJYdHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/ipQf+JLeXW1HaD5iNnyUl
 Uh0CLvwwkXvuiDAlaoGCKl2mcVJR/2d/ScTPTGx44VEwmLpV2mgF8/VUWoRtao/C
 Kal5DsaOAC2pUKkYbnorsCpq4ty2QMPYXZXOKULPcfLa3tbsr9bE6JkCQ6gZeAAk
 ITuB+dfdBTpW2lc0eoQ7cDMcQkD1cxyfNVwZ7rP2i9N6tjTW1488kxsBthhQIr0t
 sNrrBIiK7nhdgXNfhWDPP/6f8osZwhLGO8G9tyOTtkPOF6o6Dy27B0Bmlf5T6OY+
 SeTwC2O197gd0YkPWvZgMQbJWnX0kHgHwlFEBaMSxMXAcrlccNZQMyBN4cYoC+ie
 e3vyWA==
 =lj1s
 -----END PGP SIGNATURE-----

Merge tag 'pull-rx-20220421' of https://gitlab.com/rth7680/qemu into staging

Fix usp/isp swapping upon clrpsw/setpsw.
Fix psw.i/pc upon wait.
Align dtb in ram.

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmJhlJYdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/ipQf+JLeXW1HaD5iNnyUl
# Uh0CLvwwkXvuiDAlaoGCKl2mcVJR/2d/ScTPTGx44VEwmLpV2mgF8/VUWoRtao/C
# Kal5DsaOAC2pUKkYbnorsCpq4ty2QMPYXZXOKULPcfLa3tbsr9bE6JkCQ6gZeAAk
# ITuB+dfdBTpW2lc0eoQ7cDMcQkD1cxyfNVwZ7rP2i9N6tjTW1488kxsBthhQIr0t
# sNrrBIiK7nhdgXNfhWDPP/6f8osZwhLGO8G9tyOTtkPOF6o6Dy27B0Bmlf5T6OY+
# SeTwC2O197gd0YkPWvZgMQbJWnX0kHgHwlFEBaMSxMXAcrlccNZQMyBN4cYoC+ie
# e3vyWA==
# =lj1s
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 21 Apr 2022 10:29:58 AM PDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-rx-20220421' of https://gitlab.com/rth7680/qemu:
  target/rx: update PC correctly in wait instruction
  target/rx: set PSW.I when executing wait instruction
  hw/rx: rx-gdbsim DTB load address aligned of 16byte.
  target/rx: Swap stack pointers on clrpsw/setpsw instruction
  target/rx: Move DISAS_UPDATE check for write to PSW
  target/rx: Store PSW.U in tb->flags
  target/rx: Put tb_flags into DisasContext

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-04-21 16:45:41 -07:00
..
cpu-param.h
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
cpu.h target/rx: Store PSW.U in tb->flags 2022-04-21 10:04:33 -07:00
disas.c
gdbstub.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
helper.c
helper.h target/rx: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
insns.decode
Kconfig
meson.build
op_helper.c Fix usp/isp swapping upon clrpsw/setpsw. 2022-04-21 16:45:41 -07:00
translate.c target/rx: update PC correctly in wait instruction 2022-04-21 10:09:12 -07:00