qemu-e2k/target/mips/tcg/tx79.decode
Philippe Mathieu-Daudé 18f86aecd6 target/mips: Fix TX79 LQ/SQ opcodes
The base register address offset is *signed*.

Cc: qemu-stable@nongnu.org
Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914090447.12557-1-philmd@linaro.org>
2023-11-07 12:13:28 +01:00

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# Toshiba C790's instruction set
#
# Copyright (C) 2021 Philippe Mathieu-Daudé
#
# SPDX-License-Identifier: LGPL-2.1-or-later
#
# Toshiba Appendix B C790-Specific Instruction Set Details
###########################################################################
# Named attribute sets. These are used to make nice(er) names
# when creating helpers common to those for the individual
# instruction patterns.
&r rs rt rd sa
&i base rt offset
###########################################################################
# Named instruction formats. These are generally used to
# reduce the amount of duplication between instruction patterns.
@rs_rt_rd ...... rs:5 rt:5 rd:5 ..... ...... &r sa=0
@rt_rd ...... ..... rt:5 rd:5 ..... ...... &r sa=0 rs=0
@rs ...... rs:5 ..... .......... ...... &r sa=0 rt=0 rd=0
@rd ...... .......... rd:5 ..... ...... &r sa=0 rs=0 rt=0
@ldst ...... base:5 rt:5 offset:s16 &i
###########################################################################
MFHI1 011100 0000000000 ..... 00000 010000 @rd
MTHI1 011100 ..... 0000000000 00000 010001 @rs
MFLO1 011100 0000000000 ..... 00000 010010 @rd
MTLO1 011100 ..... 0000000000 00000 010011 @rs
# MMI0
PSUBW 011100 ..... ..... ..... 00001 001000 @rs_rt_rd
PCGTW 011100 ..... ..... ..... 00010 001000 @rs_rt_rd
PSUBH 011100 ..... ..... ..... 00101 001000 @rs_rt_rd
PCGTH 011100 ..... ..... ..... 00110 001000 @rs_rt_rd
PSUBB 011100 ..... ..... ..... 01001 001000 @rs_rt_rd
PCGTB 011100 ..... ..... ..... 01010 001000 @rs_rt_rd
PEXTLW 011100 ..... ..... ..... 10010 001000 @rs_rt_rd
PPACW 011100 ..... ..... ..... 10011 001000 @rs_rt_rd
PEXTLH 011100 ..... ..... ..... 10110 001000 @rs_rt_rd
PEXTLB 011100 ..... ..... ..... 11010 001000 @rs_rt_rd
# MMI1
PCEQW 011100 ..... ..... ..... 00010 101000 @rs_rt_rd
PCEQH 011100 ..... ..... ..... 00110 101000 @rs_rt_rd
PCEQB 011100 ..... ..... ..... 01010 101000 @rs_rt_rd
PEXTUW 011100 ..... ..... ..... 10010 101000 @rs_rt_rd
# MMI2
PCPYLD 011100 ..... ..... ..... 01110 001001 @rs_rt_rd
PAND 011100 ..... ..... ..... 10010 001001 @rs_rt_rd
PXOR 011100 ..... ..... ..... 10011 001001 @rs_rt_rd
PROT3W 011100 00000 ..... ..... 11111 001001 @rt_rd
# MMI3
PCPYUD 011100 ..... ..... ..... 01110 101001 @rs_rt_rd
POR 011100 ..... ..... ..... 10010 101001 @rs_rt_rd
PNOR 011100 ..... ..... ..... 10011 101001 @rs_rt_rd
PCPYH 011100 00000 ..... ..... 11011 101001 @rt_rd
# SPECIAL
LQ 011110 ..... ..... ................ @ldst
SQ 011111 ..... ..... ................ @ldst