qemu-e2k/target
Richard Henderson 39eea56172 target/arm: Implement SVE Bitwise Logical - Unpredicated Group
These were the instructions that were stubbed out when
introducing the decode skeleton.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-05-18 17:48:08 +01:00
..
alpha
arm target/arm: Implement SVE Bitwise Logical - Unpredicated Group 2018-05-18 17:48:08 +01:00
cris * Don't silently truncate extremely long words in the command line 2018-05-14 09:55:09 +01:00
hppa fpu/softfloat: Specialize on snan_bit_is_one 2018-05-17 15:27:15 -07:00
i386 i386: Add new property to control cache info 2018-05-15 11:33:33 -03:00
lm32
m68k target/m68k: Use floatX_silence_nan when we have already checked for SNaN 2018-05-17 15:27:15 -07:00
microblaze
mips target/mips: Remove floatX_maybe_silence_nan from conversions 2018-05-17 15:27:15 -07:00
moxie
nios2
openrisc target/openrisc: Merge disas_openrisc_insn 2018-05-14 14:58:08 -07:00
ppc fpu/softfloat: Specialize on snan_bit_is_one 2018-05-17 15:27:15 -07:00
riscv target/riscv: Remove floatX_maybe_silence_nan from conversions 2018-05-17 15:27:15 -07:00
s390x target/s390x: Remove floatX_maybe_silence_nan from conversions 2018-05-17 15:27:15 -07:00
sh4 fpu/softfloat: Specialize on snan_bit_is_one 2018-05-17 15:27:15 -07:00
sparc
tilegx
tricore
unicore32 fpu/softfloat: Specialize on snan_bit_is_one 2018-05-17 15:27:15 -07:00
xtensa