OpenE2K/qemu-e2k
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qemu-e2k/target-i386
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Peter Maydell ef3cb5ca82 Merge remote-tracking branch 'remotes/kvm/uq/master' into staging 
* remotes/kvm/uq/master:
  pc: port 92 reset requires a low->high transition
  cpu: make CPU_INTERRUPT_RESET available on all targets
  apic: do not accept SIPI on the bootstrap processor
  target-i386: preserve FPU and MSR state on INIT
  target-i386: fix set of registers zeroed on reset
  kvm: forward INIT signals coming from the chipset
  kvm: reset state from the CPU's reset method
  target-i386: the x86 CPL is stored in CS.selector - auto update hflags accordingly.
  target-i386: set eflags prior to calling cpu_x86_load_seg_cache() in seg_helper.c
  target-i386: set eflags and cr0 prior to calling cpu_x86_load_seg_cache() in smm_helper.c
  target-i386: set eflags prior to calling svm_load_seg_cache() in svm_helper.c
  pci-assign: limit # of msix vectors
  pci-assign: Fix a bug when map MSI-X table memory failed
  kvm: make one_reg helpers available for everyone
  target-i386: Remove unused data from local array

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-15 15:38:40 +01:00
..
arch_dump.c dump: rebase from host-private RAMBlock offsets to guest-physical addresses 2013-08-08 11:01:46 -04:00
arch_memory_mapping.c exec: Make ldq/ldub_*_phys input an AddressSpace 2014-02-11 22:57:00 +10:00
cc_helper_template.h target-i386: Implement BLSR, BLSMSK, BLSI 2013-02-18 15:52:05 -08:00
cc_helper.c target-i386: Fix CC_OP_CLR vs PF 2014-02-28 08:43:15 -08:00
cpu-qom.h target-i386: X86CPU model subclasses 2014-03-13 19:20:07 +01:00
cpu.c target-i386: preserve FPU and MSR state on INIT 2014-05-13 13:12:40 +02:00
cpu.h cpu: make CPU_INTERRUPT_RESET available on all targets 2014-05-13 13:21:51 +02:00
excp_helper.c cpu-exec: Change cpu_loop_exit() argument to CPUState 2014-03-13 19:20:47 +01:00
fpu_helper.c target-i386: Fix SSE status flag corruption 2014-02-28 08:44:01 -08:00
gdbstub.c target-i386: Fix SSE status flag corruption 2014-02-28 08:44:01 -08:00
helper.c target-i386: preserve FPU and MSR state on INIT 2014-05-13 13:12:40 +02:00
helper.h target-i386: yield to another VCPU on PAUSE 2013-11-21 17:39:20 +01:00
int_helper.c target-i386/helper: remove EDX macro 2013-06-15 17:49:10 +00:00
ioport-user.c
kvm_i386.h kvm: forward INIT signals coming from the chipset 2014-05-13 13:12:40 +02:00
kvm-stub.c target-i386: Fix build by providing stub kvm_arch_get_supported_cpuid() 2013-11-21 17:39:11 +01:00
kvm.c kvm: forward INIT signals coming from the chipset 2014-05-13 13:12:40 +02:00
machine.c target-i386: reorder fields in cpu/msr_hyperv_hypercall subsection 2014-04-05 10:49:05 +01:00
Makefile.objs Makefile.target: CONFIG_NO_* variables removed 2013-10-16 18:21:00 +02:00
mem_helper.c translate-all: Change cpu_restore_state() argument to CPUState 2014-03-13 19:20:47 +01:00
misc_helper.c cputlb: Change tlb_flush_page() argument to CPUState 2014-03-13 19:52:47 +01:00
ops_sse_header.h target-i386: add AES-NI instructions 2013-04-13 13:51:57 +02:00
ops_sse.h target-i386: add AES-NI instructions 2013-04-13 13:51:57 +02:00
seg_helper.c target-i386: the x86 CPL is stored in CS.selector - auto update hflags accordingly. 2014-05-13 13:12:40 +02:00
shift_helper_template.h target-i386: compute eflags outside rcl/rcr helper 2013-02-18 15:03:56 -08:00
smm_helper.c target-i386: set eflags and cr0 prior to calling cpu_x86_load_seg_cache() in smm_helper.c 2014-05-13 13:12:40 +02:00
svm_helper.c target-i386: the x86 CPL is stored in CS.selector - auto update hflags accordingly. 2014-05-13 13:12:40 +02:00
svm.h
TODO
topology.h target-i386: Inline bitops_flsl 2013-02-16 11:12:29 +00:00
translate.c target-i386: Preserve the Z bit for bt/bts/btr/btc 2014-05-12 14:20:04 -07:00