qemu-e2k/target/riscv/insn_trans
Christoph Müllner 426c049196 RISC-V: Adding XTheadBb ISA extension
This patch adds support for the XTheadBb ISA extension.
The patch uses the T-Head specific decoder and translation.

Co-developed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230131202013.2541053-5-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-07 08:19:23 +10:00
..
trans_privileged.c.inc
trans_rva.c.inc
trans_rvb.c.inc
trans_rvd.c.inc
trans_rvf.c.inc
trans_rvh.c.inc
trans_rvi.c.inc
trans_rvk.c.inc
trans_rvm.c.inc
trans_rvv.c.inc
trans_rvzawrs.c.inc
trans_rvzfh.c.inc
trans_svinval.c.inc
trans_xthead.c.inc RISC-V: Adding XTheadBb ISA extension 2023-02-07 08:19:23 +10:00
trans_xventanacondops.c.inc