qemu-e2k/hw/riscv
Zhuang, Siwei (Data61, Kensington NSW) 6478dd745d hw/riscv: Add optional symbol callback ptr to riscv_load_kernel()
This patch adds an optional function pointer, "sym_cb", to
riscv_load_kernel() which provides the possibility to access the symbol
table during kernel loading.

The pointer is ignored, if supplied with Image or uImage file.

The Spike board requires the access to locate the HTIF symbols.

Fixes: 0ac24d56c5 ("hw/riscv: Split out the boot functions")
Buglink: https://bugs.launchpad.net/qemu/+bug/1835827
Signed-off-by: Siwei Zhuang <siwei.zhuang@data61.csiro.au>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2019-11-25 12:34:52 -08:00
..
Kconfig riscv/virt: Add the PFlash CFI01 device 2019-10-28 07:47:28 -07:00
Makefile.objs riscv: sifive: Implement a model for SiFive FU540 OTP 2019-09-17 08:42:49 -07:00
boot.c hw/riscv: Add optional symbol callback ptr to riscv_load_kernel() 2019-11-25 12:34:52 -08:00
riscv_hart.c riscv: hart: Add a "hartid-base" property to RISC-V hart array 2019-09-17 08:42:47 -07:00
riscv_htif.c hw: Do not include "exec/address-spaces.h" if it is not necessary 2018-06-01 14:15:10 +02:00
sifive_clint.c Include hw/qdev-properties.h less 2019-08-16 13:31:53 +02:00
sifive_e.c hw/riscv: Add optional symbol callback ptr to riscv_load_kernel() 2019-11-25 12:34:52 -08:00
sifive_e_prci.c riscv: sifive_e: prci: Update the PRCI register block size 2019-09-17 08:42:46 -07:00
sifive_gpio.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
sifive_plic.c riscv: plic: Remove unused interrupt functions 2019-09-17 08:42:42 -07:00
sifive_test.c riscv: hw: Remove the unnecessary include of target/riscv/cpu.h 2019-09-17 08:42:45 -07:00
sifive_u.c hw/riscv: Add optional symbol callback ptr to riscv_load_kernel() 2019-11-25 12:34:52 -08:00
sifive_u_otp.c riscv: sifive: Implement a model for SiFive FU540 OTP 2019-09-17 08:42:49 -07:00
sifive_u_prci.c riscv: sifive: Implement PRCI model for FU540 2019-09-17 08:42:47 -07:00
sifive_uart.c riscv: hw: Remove the unnecessary include of target/riscv/cpu.h 2019-09-17 08:42:45 -07:00
spike.c hw/riscv: Add optional symbol callback ptr to riscv_load_kernel() 2019-11-25 12:34:52 -08:00
trace-events SiFive RISC-V GPIO Device 2019-05-24 11:58:30 -07:00
virt.c hw/riscv: Add optional symbol callback ptr to riscv_load_kernel() 2019-11-25 12:34:52 -08:00