qemu-e2k/target/openrisc
Stafford Horne 461a4b944f target/openrisc: Fixes for memory debugging
When debugging in gdb you might want to inspect instructions in mapped
pages or in exception vectors like 0x800 etc.  This was previously not
possible in qemu since the *get_phys_page_debug() routine only looked
into the data tlb.

Change to fall back to look into instruction tlb and plain physical
pages.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-05-04 09:38:49 +09:00
..
Makefile.objs target/openrisc: Streamline arithmetic and OVE 2017-02-14 08:14:59 +11:00
cpu.c target/openrisc: Implement EVBAR register 2017-04-21 23:55:48 +09:00
cpu.h target/openrisc: Implement EVBAR register 2017-04-21 23:55:48 +09:00
exception.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
exception.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
exception_helper.c target/openrisc: Optimize for r0 being zero 2017-02-14 08:15:00 +11:00
fpu_helper.c target/openrisc: Fix madd 2017-02-14 08:15:00 +11:00
gdbstub.c target/openrisc: Tidy handling of delayed branches 2017-02-14 08:15:00 +11:00
helper.h target/openrisc: Fix madd 2017-02-14 08:15:00 +11:00
interrupt.c target/openrisc: Implement EPH bit 2017-04-21 23:56:00 +09:00
interrupt_helper.c target/openrisc: Tidy ppc/npc implementation 2017-02-14 08:15:00 +11:00
machine.c target/openrisc: Tidy ppc/npc implementation 2017-02-14 08:15:00 +11:00
mmu.c target/openrisc: Fixes for memory debugging 2017-05-04 09:38:49 +09:00
mmu_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
sys_helper.c target/openrisc: Implement EVBAR register 2017-04-21 23:55:48 +09:00
translate.c target/openrisc: Optimize for r0 being zero 2017-02-14 08:15:00 +11:00