qemu-e2k/disas
Rob Bradford 6c848c192e disas/riscv: Add amocas.[w,d,q] instructions
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20231207153842.32401-3-rbradford@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-01-10 18:47:47 +10:00
..
alpha.c
capstone.c
cris.c disas/cris: Pass buffer size to format_dec() to avoid overflow warning 2023-11-24 16:21:55 +01:00
disas-internal.h disas: Move softmmu specific code to separate file 2023-05-11 09:49:55 +01:00
disas-mon.c disas: Move softmmu specific code to separate file 2023-05-11 09:49:55 +01:00
disas.c disas: Move disas.c into the target-independent source set 2023-05-11 09:51:07 +01:00
hexagon.c
hppa.c disas/hppa: Show hexcode of instruction along with disassembly 2023-11-17 18:36:36 +01:00
m68k.c disas/m68k: clean up local variable shadowing 2023-09-29 10:07:21 +02:00
meson.build disas/riscv: Add support for XThead* instructions 2023-07-10 22:29:14 +10:00
microblaze.c
mips.c
nanomips.c disas/nanomips: Tidy read for 48-bit opcodes 2022-11-08 01:04:25 +01:00
nios2.c
riscv-xthead.c disas/riscv: Add support for XThead* instructions 2023-07-10 22:29:14 +10:00
riscv-xthead.h disas/riscv: Add support for XThead* instructions 2023-07-10 22:29:14 +10:00
riscv-xventana.c disas/riscv: Add support for XVentanaCondOps 2023-07-10 22:29:14 +10:00
riscv-xventana.h disas/riscv: Add support for XVentanaCondOps 2023-07-10 22:29:14 +10:00
riscv.c disas/riscv: Add amocas.[w,d,q] instructions 2024-01-10 18:47:47 +10:00
riscv.h disas/riscv: Add rv_codec_vror_vi for vror.vi 2023-11-07 11:06:02 +10:00
sh4.c
sparc.c
xtensa.c