qemu-e2k/target/ppc
Leandro Lupori 4ddc104689 target/ppc: Fix tlbie
Commit 74c4912f09 changed check_tlb_flush() to use
tlb_flush_all_cpus_synced() instead of calling tlb_flush() on each
CPU. However, as side effect of this, a CPU executing a ptesync
after a tlbie will have its TLB flushed only after exiting its
current Translation Block (TB).

This causes memory accesses to invalid pages to succeed, if they
happen to be on the same TB as the ptesync.

To fix this, use tlb_flush_all_cpus() instead, that immediately
flushes the TLB of the CPU executing the ptesync instruction.

Fixes: 74c4912f09 ("target/ppc: Fix synchronization of mttcg with broadcast TLB flushes")
Signed-off-by: Leandro Lupori <leandro.lupori@eldorado.org.br>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20220503163904.22575-1-leandro.lupori@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-26 17:11:32 -03:00
..
translate target/ppc: implement xscvqp[su]qz 2022-04-20 18:00:30 -03:00
arch_dump.c Replace config-time define HOST_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00
compat.c
cpu_init.c disas: Remove old libopcode ppc disassembler 2022-05-09 08:21:05 +02:00
cpu-models.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
cpu-models.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c target/ppc: Remove fpscr_* macros from cpu.h 2022-05-05 15:36:17 -03:00
cpu.h target/ppc: Change MSR_* to follow POWER ISA numbering convention 2022-05-05 15:36:17 -03:00
dfp_helper.c
excp_helper.c target/ppc: Remove msr_hv macro 2022-05-05 15:36:17 -03:00
fpu_helper.c target/ppc: Remove fpscr_* macros from cpu.h 2022-05-05 15:36:17 -03:00
gdbstub.c target/ppc: Remove msr_le macro 2022-05-05 15:36:17 -03:00
helper_regs.c target/ppc: Fix tlbie 2022-05-26 17:11:32 -03:00
helper_regs.h
helper.h target/ppc: implement xscvqp[su]qz 2022-04-20 18:00:30 -03:00
insn32.decode target/ppc: implement xscvqp[su]qz 2022-04-20 18:00:30 -03:00
insn64.decode target/ppc: implement plxssp/pstxssp 2022-03-02 06:51:38 +01:00
int_helper.c Replace config-time define HOST_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00
internal.h compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
Kconfig
kvm_ppc.h
kvm-stub.c
kvm.c target/ppc: Remove msr_ts macro 2022-05-05 15:36:17 -03:00
machine.c target/ppc: Remove msr_ts macro 2022-05-05 15:36:17 -03:00
mem_helper.c target/ppc: Remove msr_hv macro 2022-05-05 15:36:17 -03:00
meson.build target/ppc: make power8-pmu.c CONFIG_TCG only 2022-03-02 06:51:36 +01:00
misc_helper.c target/ppc: Remove msr_hv macro 2022-05-05 15:36:17 -03:00
mmu_common.c target/ppc: Remove msr_dr macro 2022-05-05 15:36:17 -03:00
mmu_helper.c target/ppc: Remove msr_cm macro 2022-05-05 15:36:17 -03:00
mmu-book3s-v3.c
mmu-book3s-v3.h
mmu-books.h
mmu-hash32.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu-hash32.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu-hash64.c
mmu-hash64.h
mmu-radix64.c target/ppc: Remove msr_hv macro 2022-05-05 15:36:17 -03:00
mmu-radix64.h target/ppc: Check effective address validity 2022-01-04 07:55:34 +01:00
monitor.c
power8-pmu-regs.c.inc target/ppc: enable PMU instruction count 2021-12-17 17:57:18 +01:00
power8-pmu.c target/ppc: trigger PERFM EBBs from power8-pmu.c 2022-03-02 06:51:36 +01:00
power8-pmu.h Clean up ill-advised or unusual header guards 2022-05-11 16:50:01 +02:00
spr_common.h target/ppc: Move common SPR functions out of cpu_init 2022-02-18 08:34:15 +01:00
tcg-stub.c
timebase_helper.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
trace-events target/ppc: Improve KVM hypercall trace 2022-04-20 18:00:30 -03:00
trace.h
translate.c exec/translator: Pass the locked filepointer to disas_log hook 2022-04-20 10:51:11 -07:00
user_only_helper.c