Peter Maydell 12fbf1a163 hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions ... In many of the NVIC registers relating to interrupts, we have to convert from a byte offset within a register set into the number of the first interrupt which is affected. We were getting this wrong for: * reads of NVIC_ISPR<n>, NVIC_ISER<n>, NVIC_ICPR<n>, NVIC_ICER<n>, NVIC_IABR<n> -- in all these cases we were missing the "* 8" needed to convert from the byte offset to the interrupt number (since all these registers use one bit per interrupt) * writes of NVIC_IPR<n> had the opposite problem of a spurious "* 8" (since these registers use one byte per interrupt) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180209165810.6668-9-peter.maydell@linaro.org		2018-02-15 18:29:49 +00:00
..
allwinner-a10-pic.c
apic_common.c
apic.c	apic: add function to apic that will be used by hvf	2017-12-22 15:01:19 +01:00
arm_gic_common.c
arm_gic_kvm.c	qdev: use device_class_set_parent_realize/unrealize/reset()	2018-02-05 13:54:38 +01:00
arm_gic.c	qdev: use device_class_set_parent_realize/unrealize/reset()	2018-02-05 13:54:38 +01:00
arm_gicv2m.c
arm_gicv3_common.c
arm_gicv3_cpuif.c
arm_gicv3_dist.c	hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI	2018-01-11 13:25:40 +00:00
arm_gicv3_its_common.c	hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI	2018-01-11 13:25:40 +00:00
arm_gicv3_its_kvm.c	qdev: use device_class_set_parent_realize/unrealize/reset()	2018-02-05 13:54:38 +01:00
arm_gicv3_kvm.c	qdev: use device_class_set_parent_realize/unrealize/reset()	2018-02-05 13:54:38 +01:00
arm_gicv3_redist.c	hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI	2018-01-11 13:25:40 +00:00
arm_gicv3.c	qdev: use device_class_set_parent_realize/unrealize/reset()	2018-02-05 13:54:38 +01:00
armv7m_nvic.c	hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions	2018-02-15 18:29:49 +00:00
aspeed_vic.c
bcm2835_ic.c
bcm2836_control.c
etraxfs_pic.c
exynos4210_combiner.c
exynos4210_gic.c
gic_internal.h
gicv3_internal.h
grlib_irqmp.c	sparc/leon3 irqmp: fix IRQ software ack	2018-01-24 19:19:50 +00:00
heathrow_pic.c
i8259_common.c	i8259: move TYPE_INTERRUPT_STATS_PROVIDER upper	2017-12-21 09:30:32 +01:00
i8259.c	qdev: use device_class_set_parent_realize/unrealize/reset()	2018-02-05 13:54:38 +01:00
imx_avic.c
imx_gpcv2.c	i.MX: Add code to emulate GPCv2 IP block	2018-02-09 10:40:30 +00:00
intc.c
ioapic_common.c
ioapic.c	ioapic/tracing: Remove last DPRINTFs	2017-11-14 14:31:33 +01:00
lm32_pic.c	misc: drop old i386 dependency	2017-12-18 17:07:03 +03:00
Makefile.objs	i.MX: Add code to emulate GPCv2 IP block	2018-02-09 10:40:30 +00:00
mips_gic.c
nios2_iic.c
omap_intc.c	Replace all occurances of __FUNCTION__ with __func__	2018-01-22 09:46:18 +01:00
ompic.c
openpic_kvm.c
openpic.c	openpic: debug w/ info_report()	2017-12-15 09:49:24 +11:00
pl190.c
puv3_intc.c
realview_gic.c
s390_flic_kvm.c	s390x/kvm: cache the kvm flic in a central function	2018-02-09 09:37:13 +01:00
s390_flic.c	s390x/flic: cache the common flic class in a central function	2018-02-09 09:37:13 +01:00
sh_intc.c
slavio_intctl.c	sun4m: remove include/hw/sparc/sun4m.h and all references to it	2018-01-09 21:48:20 +00:00
trace-events	target/arm: Split "get pending exception info" from "acknowledge it"	2018-02-09 10:40:27 +00:00
vgic_common.h
xics_kvm.c	xics/kvm: synchonize state before 'info pic'	2017-11-14 11:12:42 +11:00
xics_pnv.c	Include qapi/error.h exactly where needed	2018-02-09 13:50:17 +01:00
xics_spapr.c	Include qapi/error.h exactly where needed	2018-02-09 13:50:17 +01:00
xics.c	spapr: introduce a spapr_qirq() helper	2017-12-15 09:49:24 +11:00
xilinx_intc.c
xlnx-pmu-iomod-intc.c	xlnx-pmu-iomod-intc: Add the PMU Interrupt controller	2018-01-26 11:09:09 +01:00
xlnx-zynqmp-ipi.c	xlnx-zynqmp-ipi: Initial version of the Xilinx IPI device	2018-01-26 11:09:09 +01:00