* Support PSCI 0.2 when using KVM
* fix AIRCR reset value for v7M CPUs
* report correct size information for pflash_cfi01
* minor coverity fixes
* avoid warnings on Windows builds due to #define clash
* implement TTBCR PD0/PD1 bits
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABCAAGBQJTox9KAAoJEDwlJe0UNgzez98QAJX/vDCzykydJ/C+6nYKokPK
KjfhA4p1Cw+FpxMK7QNGPB5mEspkDiChrSHv8oh5Asj1OUnDVrczIlGu8w0ZefSz
WMh5Rc7oK+5zdX3HgntuYR7/gM4Ami15E6wQzCAlWLq9lw3V1thLdeq5tTzTerbH
laqo/EeuLOwYpJYQsceHOOUGQEm5P+Ucgguc1ciBvqwVe5Rdv4HZwd784F6IWUZR
aaBPG0X/qPNvN7Wg2plrb9Pon9C0HOYJRJ58IjWFsfpZjRlQlSNmQvHTNC4hcRzM
JVY25eM2m8mGvv4PsJBjbQlBlCknsvxsmkAv2Jna36bNeWqsFcgX82UbQ5xcajiF
MOLTbdQeJiFrn+sfvYAGYooQLLNSMtgr32yHrcSeM/NS4v1gTwHWVM1G3oucnrcC
053gdHo61x50TM9zFX9Eqv3GYY68pRN1Kzdu3XDLNQaED/VYjlOHeT0/4tvmmYOC
u4ccHbz25wZnI7kBEqPfrzUnBGmplHXRFurqGIw6Rhd4fuCBnGQLBG8sm3I/2CdH
y+FHIOqXrb/Ltd3ZTeI6vgHCyASV3dRTyAiHQx9vwv130DNFcN8oc1JW2Hx+aJVW
NwSxVvxlFEyU9n8EXNd20FYM7ODVu5fwH9hm8tG3Sy9jMZ64PDHwwbKL4xZBmO7J
ehboH93wzEXAtI5vKjcu
=IOau
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140619' into staging
target-arm:
* Support PSCI 0.2 when using KVM
* fix AIRCR reset value for v7M CPUs
* report correct size information for pflash_cfi01
* minor coverity fixes
* avoid warnings on Windows builds due to #define clash
* implement TTBCR PD0/PD1 bits
# gpg: Signature made Thu 19 Jun 2014 18:35:06 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-20140619:
armv7m_nvic: fix AIRCR implementation
Use PSCI v0.2 compatible string when KVM or TCG provides it
target-arm: Introduce per-CPU field for PSCI version
target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64
target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible
target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64
kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT
hw/block/pflash_cfi01: Report correct size info for parallel configs
hw/arm/vexpress: Forbid specifying flash contents in two ways at once
target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv()
target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int()
target-arm: Add ULL suffix to calculation of page size
hw/arm/spitz: Avoid clash with Windows header symbol MOD_SHIFT
target-arm: implement PD0/PD1 bits for TTBCR
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
53001c1483