e7bbb7cb71
ALU instructions can write to both memory and flags. If the CC_SRC* and CC_DST locations have been written already when a memory access causes a fault, the value in CC_SRC* and CC_DST might be interpreted with the wrong CC_OP (the one that is in effect before the instruction. Besides just using the wrong result for the flags, something like subtracting -1 can have disastrous effects if the current CC_OP is CC_OP_EFLAGS: this is because QEMU does not expect bits outside the ALU flags to be set in CC_SRC, and env->eflags can end up set to all-ones. In the case of the attached testcase, this sets IOPL to 3 and would cause an assertion failure if SUB is moved to the new decoder. This mechanism is not really needed for BMI instructions, which can only write to a register, but put it to use anyway for cleanliness. In the case of BZHI, the code has to be modified slightly to ensure that decode->cc_src is written, otherwise the new assertions trigger. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|---|---|---|
| .. | ||
| aarch64 | ||
| alpha | ||
| arm | ||
| cris | ||
| hexagon | ||
| hppa | ||
| i386 | ||
| loongarch64 | ||
| m68k | ||
| minilib | ||
| mips | ||
| multiarch | ||
| nios2 | ||
| openrisc | ||
| ppc | ||
| ppc64 | ||
| ppc64le | ||
| riscv64 | ||
| s390x | ||
| sh4 | ||
| sparc64 | ||
| tricore | ||
| x86_64 | ||
| xtensa | ||
| xtensaeb | ||
| Makefile.target | ||
| README | ||
This directory contains various interesting guest programs for regression testing. Tests are either multi-arch, meaning they can be built for all guest architectures that support linux-user executable, or they are architecture specific. CRIS ==== The testsuite for CRIS is in tests/tcg/cris. You can run it with "make test-cris".