Frank Chang 57a2d89a82 target/riscv: rvv-1.0: remove amo operations instructions ... Vector AMOs are removed from standard vector extensions. Will be added later as separate Zvamo extension, but will need a different encoding from earlier proposal. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20211210075704.23951-19-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2021-12-20 14:51:36 +10:00
..
insn_trans	target/riscv: rvv-1.0: remove amo operations instructions	2021-12-20 14:51:36 +10:00
arch_dump.c
bitmanip_helper.c	target/riscv: Add rev8 instruction, removing grev/grevi	2021-10-07 08:41:33 +10:00
cpu_bits.h	target/riscv: rvv-1.0: add vlenb register	2021-12-20 14:51:36 +10:00
cpu_helper.c	target/riscv: rvv-1.0: add translation-time vector context status	2021-12-20 14:51:36 +10:00
cpu_user.h
cpu-param.h
cpu.c	target/riscv: drop vector 0.7.1 and add 1.0 support	2021-12-20 14:51:36 +10:00
cpu.h	target/riscv: rvv-1.0: add VMA and VTA	2021-12-20 14:51:36 +10:00
csr.c	target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers	2021-12-20 14:51:36 +10:00
fpu_helper.c	target/riscv: zfh: half-precision floating-point classify	2021-12-20 14:51:36 +10:00
gdbstub.c	target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl	2021-10-22 07:47:51 +10:00
helper.h	target/riscv: rvv-1.0: remove amo operations instructions	2021-12-20 14:51:36 +10:00
insn16.decode
insn32.decode	target/riscv: rvv-1.0: remove amo operations instructions	2021-12-20 14:51:36 +10:00
instmap.h
internals.h	target/riscv: rvv-1.0: remove MLEN calculations	2021-12-20 14:51:36 +10:00
Kconfig
machine.c	target/riscv: machine: Sort the .subsections	2021-11-17 19:18:22 +10:00
meson.build
monitor.c	target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl	2021-10-22 07:47:51 +10:00
op_helper.c	target/riscv: Reorg csr instructions	2021-09-01 11:59:12 +10:00
pmp.c
pmp.h
trace-events
trace.h
translate.c	target/riscv: rvv-1.0: add fractional LMUL	2021-12-20 14:51:36 +10:00
vector_helper.c	target/riscv: rvv-1.0: remove amo operations instructions	2021-12-20 14:51:36 +10:00