c79aa350ea
NPCM7XX models have been commited after the conversion from
commit 8063396bf3 ("Use OBJECT_DECLARE_SIMPLE_TYPE when possible").
Manually convert them.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230109140306.23161-11-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
74 lines
2.3 KiB
C
74 lines
2.3 KiB
C
/*
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* Nuvoton NPCM7xx System Global Control Registers.
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*
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* Copyright 2020 Google LLC
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#ifndef NPCM7XX_GCR_H
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#define NPCM7XX_GCR_H
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#include "exec/memory.h"
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#include "hw/sysbus.h"
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/*
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* NPCM7XX PWRON STRAP bit fields
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* 12: SPI0 powered by VSBV3 at 1.8V
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* 11: System flash attached to BMC
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* 10: BSP alternative pins.
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* 9:8: Flash UART command route enabled.
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* 7: Security enabled.
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* 6: HI-Z state control.
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* 5: ECC disabled.
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* 4: Reserved
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* 3: JTAG2 enabled.
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* 2:0: CPU and DRAM clock frequency.
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*/
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#define NPCM7XX_PWRON_STRAP_SPI0F18 BIT(12)
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#define NPCM7XX_PWRON_STRAP_SFAB BIT(11)
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#define NPCM7XX_PWRON_STRAP_BSPA BIT(10)
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#define NPCM7XX_PWRON_STRAP_FUP(x) ((x) << 8)
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#define FUP_NORM_UART2 3
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#define FUP_PROG_UART3 2
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#define FUP_PROG_UART2 1
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#define FUP_NORM_UART3 0
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#define NPCM7XX_PWRON_STRAP_SECEN BIT(7)
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#define NPCM7XX_PWRON_STRAP_HIZ BIT(6)
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#define NPCM7XX_PWRON_STRAP_ECC BIT(5)
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#define NPCM7XX_PWRON_STRAP_RESERVE1 BIT(4)
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#define NPCM7XX_PWRON_STRAP_J2EN BIT(3)
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#define NPCM7XX_PWRON_STRAP_CKFRQ(x) (x)
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#define CKFRQ_SKIPINIT 0x000
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#define CKFRQ_DEFAULT 0x111
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/*
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* Number of registers in our device state structure. Don't change this without
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* incrementing the version_id in the vmstate.
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*/
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#define NPCM7XX_GCR_NR_REGS (0x148 / sizeof(uint32_t))
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struct NPCM7xxGCRState {
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SysBusDevice parent;
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MemoryRegion iomem;
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uint32_t regs[NPCM7XX_GCR_NR_REGS];
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uint32_t reset_pwron;
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uint32_t reset_mdlr;
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uint32_t reset_intcr3;
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};
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#define TYPE_NPCM7XX_GCR "npcm7xx-gcr"
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxGCRState, NPCM7XX_GCR)
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#endif /* NPCM7XX_GCR_H */
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