qemu-e2k/target
Richard Henderson 58e93b48aa target/arm: Add minimal RAS registers
Add only the system registers required to implement zero error
records.  This means that all values for ERRSELR are out of range,
which means that it and all of the indexed error record registers
need not be implemented.

Add the EL2 registers required for injecting virtual SError.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-09 11:47:53 +01:00
..
alpha compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
arm target/arm: Add minimal RAS registers 2022-05-09 11:47:53 +01:00
avr exec/translator: Pass the locked filepointer to disas_log hook 2022-04-20 10:51:11 -07:00
cris exec/translator: Pass the locked filepointer to disas_log hook 2022-04-20 10:51:11 -07:00
hexagon compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
hppa compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
i386 WHPX: support for xcr0 2022-05-07 07:46:58 +02:00
m68k exec/translator: Pass the locked filepointer to disas_log hook 2022-04-20 10:51:11 -07:00
microblaze compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
mips target/mips: Remove stale TODO file 2022-04-26 12:36:04 +02:00
nios2 target/nios2: Advance pc when raising exceptions 2022-04-26 08:17:05 -07:00
openrisc compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
ppc target/ppc: Change MSR_* to follow POWER ISA numbering convention 2022-05-05 15:36:17 -03:00
riscv target/riscv: add scalar crypto related extenstion strings to isa_string 2022-04-29 10:47:46 +10:00
rx Fix usp/isp swapping upon clrpsw/setpsw. 2022-04-21 16:45:41 -07:00
s390x disas: Remove old libopcode s390 disassembler 2022-05-04 08:47:19 +02:00
sh4 compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
sparc compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
tricore compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
xtensa target/xtensa: implement cache test option opcodes 2022-05-06 15:37:10 -07:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build