.. |
core-dc232b
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target-xtensa: add dc232b core
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2011-10-16 10:40:02 +00:00 |
core-dc233c
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target-xtensa: add dc233c core
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2012-04-15 17:43:16 +00:00 |
core-fsf
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target-xtensa: add fsf core
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2011-10-16 10:40:16 +00:00 |
core-dc232b.c
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target-xtensa: refactor standard core configuration
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2014-02-24 04:47:02 +04:00 |
core-dc233c.c
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target-xtensa: refactor standard core configuration
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2014-02-24 04:47:02 +04:00 |
core-fsf.c
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target-xtensa: refactor standard core configuration
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2014-02-24 04:47:02 +04:00 |
cpu-qom.h
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cpu: Introduce CPUClass::gdb_{read,write}_register()
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2013-07-27 00:04:17 +02:00 |
cpu.c
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cpu: Turn cpu_has_work() into a CPUClass hook
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2014-03-13 19:01:49 +01:00 |
cpu.h
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cpu: Move watchpoint fields from CPU_COMMON to CPUState
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2014-03-13 19:20:47 +01:00 |
gdbstub.c
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cpu: Introduce CPUClass::gdb_{read,write}_register()
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2013-07-27 00:04:17 +02:00 |
helper.c
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cpu-exec: Change cpu_resume_from_signal() argument to CPUState
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2014-03-13 19:20:48 +01:00 |
helper.h
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target-xtensa: add basic checks to icache opcodes
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2014-02-24 04:47:01 +04:00 |
Makefile.objs
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cpu: Introduce CPUClass::gdb_{read,write}_register()
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2013-07-27 00:04:17 +02:00 |
op_helper.c
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cputlb: Change tlb_set_page() argument to CPUState
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2014-03-13 19:52:47 +01:00 |
overlay_tool.h
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target-xtensa: provide HW confg ID registers
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2014-02-24 04:47:02 +04:00 |
translate.c
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cpu: Move breakpoints field from CPU_COMMON to CPUState
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2014-03-13 19:20:47 +01:00 |
xtensa-semi.c
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exec: Change cpu_memory_rw_debug() argument to CPUState
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2013-07-23 02:41:33 +02:00 |