Richard Henderson dfd1b81274 accel/tcg: Introduce translator_io_start ... New wrapper around gen_io_start which takes care of the USE_ICOUNT check, as well as marking the DisasContext to end the TB. Remove exec/gen-icount.h. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2023-06-05 12:04:29 -07:00
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insn_trans	accel/tcg: Introduce translator_io_start	2023-06-05 12:04:29 -07:00
arch_dump.c
bitmanip_helper.c
common-semi-target.h
cpu_bits.h	riscv: Make sure an exception is raised if a pte is malformed	2023-05-05 10:49:50 +10:00
cpu_helper.c	tcg: Split out tcg/oversized-guest.h	2023-06-05 12:04:28 -07:00
cpu_user.h
cpu_vendorid.h	target/riscv: add Ventana's Veyron V1 CPU	2023-05-05 10:49:50 +10:00
cpu-param.h
cpu-qom.h	target/riscv: add Ventana's Veyron V1 CPU	2023-05-05 10:49:50 +10:00
cpu.c	target/riscv: add Ventana's Veyron V1 CPU	2023-05-05 10:49:50 +10:00
cpu.h	target/riscv: add CPU QOM header	2023-05-05 10:49:50 +10:00
crypto_helper.c
csr.c	target/riscv: Restore the predicate() NULL check behavior	2023-05-05 10:49:50 +10:00
debug.c
debug.h
fpu_helper.c
gdbstub.c	target/riscv: Use PRV_RESERVED instead of PRV_H	2023-05-05 10:49:50 +10:00
helper.h	target/riscv: Handle HLV, HSV via helpers	2023-05-05 10:49:50 +10:00
insn16.decode
insn32.decode
instmap.h
internals.h	target/riscv: Introduce mmuidx_2stage	2023-05-05 10:49:50 +10:00
Kconfig
kvm_riscv.h
kvm-stub.c
kvm.c
m128_helper.c
machine.c
meson.build	target/riscv: add query-cpy-definitions support	2023-05-05 10:49:50 +10:00
monitor.c
op_helper.c	target/riscv: Check SUM in the correct register	2023-05-05 10:49:50 +10:00
pmp.c
pmp.h
pmu.c
pmu.h
riscv-qmp-cmds.c	target/riscv: add TYPE_RISCV_DYNAMIC_CPU	2023-05-05 10:49:50 +10:00
sbi_ecall_interface.h
time_helper.c
time_helper.h
trace-events
trace.h
translate.c	accel/tcg: Introduce translator_io_start	2023-06-05 12:04:29 -07:00
vector_helper.c
xthead.decode
XVentanaCondOps.decode
zce_helper.c