Jonathan Cameron aa970ed586 pci/pcie_port: Add pci_find_port_by_pn() ... Simple function to search a PCIBus to find a port by it's port number. CXL interleave decoding uses the port number as a target so it is necessary to locate the port when doing interleave decoding. Signed-off-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220429144110.25167-31-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>		2022-05-13 07:57:26 -04:00
..
Kconfig
meson.build	pcie: Add support for Single Root I/O Virtualization (SR/IOV)	2022-03-06 05:08:23 -05:00
msi.c
msix.c
pci_bridge.c
pci_host.c	trace-events,pci: unify trace events format	2022-01-07 05:19:55 -05:00
pci-stub.c
pci.c	hw/cxl/rp: Add a root port	2022-05-13 06:13:36 -04:00
pcie_aer.c	pcie: Don't try triggering a LSI when not defined	2022-04-20 18:00:30 -03:00
pcie_host.c
pcie_port.c	pci/pcie_port: Add pci_find_port_by_pn()	2022-05-13 07:57:26 -04:00
pcie_sriov.c	Use g_new() & friends where that makes obvious sense	2022-03-21 15:44:44 +01:00
pcie.c	pcie: Don't try triggering a LSI when not defined	2022-04-20 18:00:30 -03:00
shpc.c
slotid_cap.c
trace-events	pcie: Add support for Single Root I/O Virtualization (SR/IOV)	2022-03-06 05:08:23 -05:00
trace.h