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qemu-e2k/target/hexagon/imported
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Taylor Simpson e628c0156b Hexagon (target/hexagon) CABAC decode bin 
The following instruction is added
    S2_cabacdecbin            Rdd32=decbin(Rss32,Rtt32)

Test cases added to tests/tcg/hexagon/misc.c

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-27-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 		2021-05-01 16:06:11 -07:00
..
allidefs.def Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
alu.idef Hexagon (target/hexagon) add A4_addp_c/A4_subp_c 2021-05-01 08:31:43 -07:00
branch.idef Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
compare.idef Hexagon (target/hexagon) cleanup ternary operators in semantics 2021-05-01 08:31:43 -07:00
encode.def Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
encode_pp.def Hexagon (target/hexagon) CABAC decode bin 2021-05-01 16:06:11 -07:00
encode_subinsn.def Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
float.idef Hexagon (target/hexagon) add F2_sfinvsqrta 2021-05-01 08:31:43 -07:00
iclass.def Hexagon (target/hexagon) instruction classes 2021-02-18 07:48:22 -08:00
ldst.idef Hexagon (target/hexagon) load into shifted register instructions 2021-05-01 16:06:11 -07:00
macros.def Hexagon (target/hexagon) CABAC decode bin 2021-05-01 16:06:11 -07:00
mpy.idef Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
shift.idef Hexagon (target/hexagon) CABAC decode bin 2021-05-01 16:06:11 -07:00
subinsns.idef Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
system.idef Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00